Stephen D Swift

US Patent:

6532238, Mar 11, 2003

Filed:

Jun 11, 1999

Appl. No.:

09/332281

Inventors:

Christophe Lecoutre - Saint Cyr lecole, FR
Isabelle Izaute - Paris, FR
Stephen J. Swift - San Diego CA

Assignee:

ELA Medical S.A. - Montrouge

International Classification:

H04J 1500

US Classification:

370403, 370404, 607 4, 607 32

Abstract:

An interconnection structure including an interconnection artery ensuring the parallel transfer, on a group of conductors, of information to be exchanged, configured in at least one ring ( ) on which information circulates in a closed loop and in a one-way direction. The artery has a plurality of coupling points to the addressable elements of the microcomputer. Some of the points of coupling ( ) include a register associated with the corresponding addressable element with the microcomputer, and others include a gateway (G , G. . . . GN) towards, and from, another ring of a lower order, on which lower order ring information also circulates in a closed loop and in a one-way direction. This results in a structure of plurality of hierarchised rings. The interconnection structure is particularly useful for battery operated processor controlled devices, such as active implantable medical devices, pacemakers, defibrillators and the like.

US Patent:

20180286821, Oct 4, 2018

Filed:

Mar 15, 2018

Appl. No.:

15/921775

Inventors:

Alain Comeau - Escondido CA, US
Stephen Swift - San Diego CA, US

International Classification:

H01L 23/64
H01L 49/02
H01L 27/12
H01L 21/84

Abstract:

An integrated circuit (IC) fabricated on a Silicon-On-Insulator (SOI) wafer, having a plurality of impedance elements cascoded in series, each impedance elements having a specified value. A subset of the impedance elements are arranged to bias a first tub at a specified very high voltage (VHV) multiplied by a first predetermined ratio. A further subset of the impedance elements are arranged to bias a second tub at VHV multiplied by a second predetermined ratio and each of the impedance elements are further arranged to bias a handle and a third surrounding tub at VHV multiplied by a third predetermined ratio. A method for designing an integrated circuit using fully dielectrically isolated processes which function reliably at higher operating voltages than that provided by the conventional processes.

US Patent:

20160121128, May 5, 2016

Filed:

Nov 3, 2015

Appl. No.:

14/931698

Inventors:

- Sunnyvale CA, US
Benjamin T. Persson - Sunnyvale CA, US
Suresh Gurunathan - Palo Alto CA, US
Donald Chin - Palo Alto CA, US
Stephen J. Swift - San Diego CA, US

International Classification:

A61N 1/372
A61N 1/365
A61N 1/375
A61N 1/362

Abstract:

In accordance with an embodiment, a system and method is provided for providing communications between first and second implantable medical devices (IMDs). The system comprises a first implantable medical device (IMD) configured to transmit a first event message during or preceding a first cardiac cycle, and a second IMD configured to receive the first event message, wherein receipt of the first event message configures the second IMD to generate pacing pulses for only a predetermined number (“n”) of consecutive cardiac cycles, wherein n is an integer equal to or greater than 2. The method comprises transmitting a first event message during or preceding a first cardiac cycle from the first IMD, receiving the first event message at the second IMD, in response to receiving the first event message, arming the second IMD to generate a pacing pulse for a second cardiac cycle, and arming the second IMD to generate a pacing pulse for only a predetermined number of consecutive cardiac cycles immediately subsequent to the second cardiac cycle.