Steven William Carey

US Patent:

7362121, Apr 22, 2008

Filed:

Jun 2, 2004

Appl. No.:

10/860237

Inventors:

Robert O. Conn - Los Gatos CA, US
Steven J. Carey - San Jose CA, US
Siuki Chan - Cupertino CA, US
William H. Pabst - Palo Alto CA, US

Assignee:

Xilinx, Inc. - San Jose CA

International Classification:

G01R 31/02

US Classification:

324765

Abstract:

A system replicates the rapid temperature increases that are believed to cause microbump failures in certain applications of programmable logic devices (PLDs). The system configures a PLD under test with a circuit that switches a large amount of current and generates a large amount of heat when the circuit is clocked. The system monitors the temperature of the PLD and controls the switching of the circuit to achieve a predetermined temperature within a predetermined time period. The PLD is cooled, and the thermal cycling is repeated. The system detects microbump failures and communicates failure data to a computer for logging and analysis.