Steven M Howe

US Patent:

6446199, Sep 3, 2002

Filed:

Jun 6, 1995

Appl. No.:

08/469420

Inventors:

Steven Michael Howe - Rochester MN
Jack Charles Kruger - Rochester MN

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 900

US Classification:

713 1, 713100, 714 6

Abstract:

In a disk type data storage device wherein the firmware used to control the device is partitioned with a first portion stored in the control circuitry and a second portion stored in the reserved area of the disk surface, the replacement of one of the portions in the field may cause the drive to have different levels or releases of firmware that will not function together. This disables the drive until diagnosed and connected. The structure disclosed includes identifiers associated with the firmware portions and the provision of a copy of the firmware first portion as well as the firmware second portion on the disk. The firmware first portion on the disk is normally never accessed and is a version compatible with the firmware second portion on the disk. During the power up sequence, the identifiers are checked for compatibility and the sequence normally continues. In the event that a portion of the firmware has been replaced and a finding of incompatibility occurs, the ROM, first portion of firmware (stored in electrically erasable, electrically programmable read only memory) in the control circuitry is erased and replaced by the firmware first portion stored on the disk.

US Patent:

7100080, Aug 29, 2006

Filed:

May 5, 2003

Appl. No.:

10/430535

Inventors:

Steven M. Howe - Rochester MN, US

Assignee:

Xiotech Corporation - Eden Prairie MN

International Classification:

G06G 11/00

US Classification:

714 24, 711135

Abstract:

A method for recovering dirty write cache data after controller power loss or failure from one of two independently battery backed up and mirrored write caches. Two independent controllers jointly operate with a permanent data storage system. Each controller has a write cache that is a mirror of the write cache in the other controller. The primary controller resets a power down flag stored each write cache upon proper shutdown. The primary controller further increments and stores a configuration sequence number into each write cache upon proper shutdown. If a primary controller powers up and identifies that the write cache was not properly shutdown due to the state of the power down flag, it flushes the dirty data in the write cache only if the configuration sequence number contained in the write cache is the same as the configuration sequence number contained in the primary controller. If the configuration sequence number in the primary controller is higher than the configuration sequence number in the write cache, the dirty data was previously flushed to permanent data storage with the other write cache.

US Patent:

7162587, Jan 9, 2007

Filed:

May 5, 2003

Appl. No.:

10/430487

Inventors:

Michael S. Hiken - Rochester MN, US
Steven M. Howe - Rochester MN, US
James N. Snead - Evota MN, US

International Classification:

G06F 15/177

US Classification:

711135, 711162

Abstract:

A method, and apparatus for recovering cache data of a failed redundant storage controller and reestablishing redundancy by mirroring cache data of a primary cache memory of a first storage controller in a secondary cache memory of another storage controller. Upon a failure occurring in a storage controller, the failure is detected and, in response, a structured list of cache tags is created in the controller where having the secondary cache that is the mirror of the primary cache of the failed controller. The primary cache memory of the non-failed storage controller that was mirrored in the secondary cache of the failed controller and the secondary cache memory of the non-failed storage controller that was linked to the primary cache of the failed controller are flushed, and an available secondary cache memory, which may be the secondary cache memory just flushed, is configured to function as a redundant cache memory for the primary cache memory of the non-failed storage controller that was mirrored in the secondary cache of the failed controller, such that cache data in the primary cache memory of the non-failed storage controller is mirrored in the available secondary cache memory.

US Patent:

7380113, May 27, 2008

Filed:

May 5, 2003

Appl. No.:

10/430607

Inventors:

David S. Ebsen - Chaska MN, US
Todd R. Burkey - Savage MN, US
Steven M. Howe - Rochester MN, US
Randal S. Rysavy - Kasson MN, US

Assignee:

Xiotech Corporation - Eden Prairie MN

International Classification:

G06F 9/24

US Classification:

713 1, 713100

Abstract:

A method of upgrading firmware during background operation in a storage area network (SAN) including at least one storage controller having programmable memory and RAM, where the at least one storage controller for controls data access between at least one host server and at least one storage device. The method includes temporarily suspending data access commands from the at least one host server, upgrading firmware stored in programmable memory, and copying a current version of firmware in a first memory address of RAM to a second memory address in the RAM. The current version of firmware in the first memory address in RAM is overwritten with the upgraded version of firmware. The controller is reinitialized, and data access commands from the at least one host server to the at least one storage device are provided by the at least one storage controller.

US Patent:

20120185658, Jul 19, 2012

Filed:

Jan 18, 2011

Appl. No.:

13/008061

Inventors:

William A. Brown - Pine Island MN, US
Thomas R. Crowley - Rochester MN, US
Steven M. Howe - Rochester MN, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

G06F 12/16

US Classification:

711162, 711E12103

Abstract:

A method for performing a write operation on a computer system having a main store, including a plurality of pages, and a backing store, the write operation including a processing step for processing data of the write operation and a writing step for writing the processed data to the backing store. The method includes reserving a set of pages, among the plurality of pages, in the main store, retrieving a required number of pages from the reserved set in accordance with the size of the data, processing the required number of pages of the data using the retrieved pages, writing the processed data to the backing store, and returning the retrieved pages to the reserved set upon finishing the writing.

US Patent:

20120265948, Oct 18, 2012

Filed:

Apr 18, 2011

Appl. No.:

13/088665

Inventors:

William A. Brown - Pine Island MN, US
Thomas R. Crowley - Rochester MN, US
Steven M. Howe - Rochester MN, US
Kristopher C. Whitney - Rochester MN, US

Assignee:

INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY

International Classification:

G06F 12/00

US Classification:

711154, 711E12001

Abstract:

In an embodiment, a skip read command is received that requests transfer of a requested block from a storage device and that requests non-transfer of a skipped block from the storage device. The skip read command specifies a skip mask that comprises an identification of a location of the requested block relative to a location of the skipped block at the storage device. In response to the skip read command, the requested block and the skipped block are transferred from the storage device by creating a read command that requests transfer of the requested block and the skipped block and sending the read command to the storage device. In various embodiments, the skipped block is transferred to a temporary buffer and not transferred to a destination buffer, or the skipped block is transferred to the destination buffer, but overwritten by a transfer of the requested block to the destination buffer.

US Patent:

59705086, Oct 19, 1999

Filed:

Jun 24, 1997

Appl. No.:

8/881081

Inventors:

Steven M. Howe - Rochester MN
Daniel John Sokolov - Rochester MN

Assignee:

Western Digital Corporation - Irvine CA

International Classification:

G06F 1200

US Classification:

711113

Abstract:

A method is provided for managing a cache in a disk drive having an intelligent interface for communicating with a host. The drive includes a magnetic disk, and the cache is divisible into a number of segments, and employs a cache control structure including cache parameters. The drive receives a first command and a second command. The method comprises the steps of: performing a scan of the cache to assign the first command to a segment; compensating the cache parameters in response to the scan; and performing a scan to assign the second command to a cache segment prior to caching of data requested in the first command.

US Patent:

60921498, Jul 18, 2000

Filed:

May 28, 1997

Appl. No.:

8/864525

Inventors:

Michael Scott Hicken - Rochester MN
Steven M. Howe - Rochester MN
Daniel John Sokolov - Rochester MN
Timothy Swatosh - Rochester MN
Jeffrey L. Williams - Rochester MN

Assignee:

Western Digital Corporation - Irvine CA

International Classification:

G06F 1200

US Classification:

711113

Abstract:

A magnetic disk drive with a caching system includes an intelligent interface to communicate with a host, a magnetic disk and a cache memory to buffer data transferred to and from the host. The caching system maximizes drive performance based on past access history. The caching system alters execution of commands by coalescing commands or executing internal commands in parallel. The caching system anticipates data requests by using a prefetch to store data that may be requested. The caching system divides the cache memory into segments to store multiple streams of data. The number of segments may be continuously adapted according to the types of access to maximize performance by maintaining a segment for each sequential stream of data. The caching system uses a dynamic priority list to determine segments to maintain and discard. Each segment is monitored to determine access types such as sequential, random, and repeating.