Steven P Marshall

US Patent:

7092193, Aug 15, 2006

Filed:

Aug 2, 2002

Appl. No.:

10/211671

Inventors:

Robert McKenzie - Longmont CO, US
Thao Nguyen - San Jose CA, US
Xiaokun Chew - San Jose CA, US
Gang Herbert Lin - San Jose CA, US
Jack Tsai - Milpitas CA, US
Bruce Schardt - Tracy CA, US
Steven Marshall - Northboro MA, US

Assignee:

Maxtor Corporation - Longmont CO

International Classification:

G11B 21/02

US Classification:

360 75

Abstract:

A disk drive includes a slider assembly and a controller that directs current to the slider assembly to dynamically adjust the head-to-disk spacing. In one embodiment, the slider assembly includes a write element having a first end, a second end and an intermediate section, a conductor that is connected to the intermediate section. In this embodiment, the controller directs electrical current through the conductor to heat the write element without writing data to a storage disk. The electrical current can be directed through the conductor at any time prior to data transfer or during data transfer. Heating the write element causes a deformation of the slider assembly to decrease the head-to-disk spacing. In another embodiment, the slider assembly includes a separate slider deformer. Electrical current is selectively directed to the slider deformer to cause a deformation of the slider assembly to obtain a desired head-to-disk spacing.

US Patent:

7388726, Jun 17, 2008

Filed:

Aug 10, 2006

Appl. No.:

11/503354

Inventors:

Robert McKenzie - Longmont CO, US
Thao Nguyen - San Jose CA, US
Xiaokun Chew - San Jose CA, US
Gang Herbert Lin - San Jose CA, US
Jack Tsai - Milpitas CA, US
Bruce Schardt - Tracy CA, US
Steven Marshall - Northboro MA, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

G11B 21/02

US Classification:

360 75, 360 7807

Abstract:

A disk drive includes a slider assembly and a controller that directs current to the slider assembly to dynamically adjust the head-to-disk spacing. In one embodiment, the slider assembly includes a write element having a first end, a second end and an intermediate section, a conductor that is connected to the intermediate section. In this embodiment, the controller directs electrical current through the conductor to heat the write element without writing data to a storage disk. The electrical current can be directed through the conductor at any time prior to data transfer or during data transfer. Heating the write element causes a deformation of the slider assembly to decrease the head-to-disk spacing. In another embodiment, the slider assembly includes a separate slider deformer. Electrical current is selectively directed to the slider deformer to cause a deformation of the slider assembly to obtain a desired head-to-disk spacing.

US Patent:

7401447, Jul 22, 2008

Filed:

May 12, 2006

Appl. No.:

11/383090

Inventors:

Steven Marshall - Fort Mill SC, US
Christian Matthew Yungbluth - Matthews NC, US

Assignee:

Ultrablend, LLC - Charlotte NC

International Classification:

B65B 7/28

US Classification:

53329, 53324, 53328, 100902

Abstract:

A closer for pressing a lid onto a container includes a presser foot mounted for reciprocating movement into and out of force applying engagement with the lid; an actuator moveable between retracted and extended positions; and a force multiplying assembly disposed in operative relationship intermediate the presser foot and the actuator for multiplying an input force from the actuator to a predetermined maximum lid pressing force at the extended position.

US Patent:

7654730, Feb 2, 2010

Filed:

May 17, 2005

Appl. No.:

11/130898

Inventors:

Steven Marshall - Fort Mill SC, US
Martin Miguel Salas - Charlotte NC, US

Assignee:

Ultrablend LLC - Charlotte NC

International Classification:

B01F 9/04

US Classification:

366217, 366605

Abstract:

An apparatus for mixing material in a container includes a platform mounted for simultaneous movement on at least two axes and for supporting a container containing material to be mixed. A motor can be operatively associated with the platform to move the platform on the two axes. A container holding assembly having a vertical extent can be carried by the platform, and is moveable between a closed position in which the holding assembly is positioned proximate the container to retain the container on the platform during mixing operations, and an open position in which the holding assembly is positioned away from the container so that the container can be removed from the platform without lifting the container over the vertical extent of the holding assembly. The platform can be contained within a housing having a low profile opening such that the container can be removed without elevating the container.

US Patent:

7710969, May 4, 2010

Filed:

May 15, 2006

Appl. No.:

11/383330

Inventors:

Andre Szczepanek - Hartwell, GB
Martin Yu Li - Missouri City TX, US
Steven P. Marshall - Houston TX, US
Travis M. Scheckel - Allen TX, US

Assignee:

Texas Instruments Incorporated - Dallas TX

International Classification:

H04L 12/28

US Classification:

370392, 370351

Abstract:

High speed networking systems such as PCI-Express and Serial Rapid I/O are based on the exchange of packets across switched networks of high speed serial links. Information in the headers of these packets indicate the kind of transaction they represent. Queuing all received packets in a single queue will cause interactions between transaction types. Indirection can be used create the effect of multiple independent queues from a shared memory. This provides efficient centralized packet storage, while allowing independent processing of different transactions types.

US Patent:

20060256876, Nov 16, 2006

Filed:

May 15, 2006

Appl. No.:

11/383317

Inventors:

Andre Szczepanek - Hartwell, GB
Martin Li - Missouri City TX, US
Steven Marshall - Houston TX, US
Travis Scheckel - Allen TX, US

International Classification:

H04B 14/06

US Classification:

375246000

Abstract:

This invention enables many interrupt source bits spread among multiple interrupt registers. An interrupt status decode register reduces the number of read cycles required to decode the interrupt source. Each unique interrupt source has a predefined and fixed logical mapping to each bit of the decode register. The logical mapping is flexible per application. The decode register bit is set if the interrupt source is asserted and the interrupt source is mapped to that particular physical interrupt. Since each physical interrupt has an associated decode register, the ability to orthogonally arrange the sources and reduce the number of register reads is even greater.

US Patent:

20060256877, Nov 16, 2006

Filed:

May 15, 2006

Appl. No.:

11/383321

Inventors:

Andre Szczepanek - Hartwell, GB
Martin Li - Missouri City TX, US
Steven Marshall - Houston TX, US
Travis Scheckel - Allen TX, US

International Classification:

H04B 14/06

US Classification:

375246000

Abstract:

The Rapid I/O Messaging Logical Layer relies on the receiving device to map the incoming messages into specific memory locations. This uses software programmable mapping registers. The settings are compared to the header fields of the incoming Rapid I/O messages to determine if there is a match, in which case, the packet is mapped to a queue. Accessibility to a queue through the mapping register can be limited to discrete MAILBOX/LETTER combinations, or multiple combinations based on the masking bits. Long messages may be processed through a hardware lookup table implemented to break up transactions into Rapid I/O compliant packets.

US Patent:

20060256878, Nov 16, 2006

Filed:

May 15, 2006

Appl. No.:

11/383322

Inventors:

Andre Szczepanek - Hartwell, GB
Martin Li - Missouri City TX, US
Steven Marshall - Houston TX, US
Travis Scheckel - Allen TX, US

International Classification:

H04B 14/06

US Classification:

375246000

Abstract:

A packet transmission system based on a simple linear linked list of packet descriptors is difficult to implement with modern switch based system because transmission acknowledgments may occur out of order in relation to packet transmission. The problem lies in how packet completion is indicated to the CPU to enable for efficient packet processing. A scoreboard system is scalable to support multiple single-segment messages and multiple multi-segment messages for hundreds of packets. When a message/segment has been sent out, the context information for the packet is remembered and its key is indexed into a CAM. When segment/message response comes back, a simple hardware lookup is performed, and the associated context information is retrieved.