Steven Robert Parks

US Patent:

6591402, Jul 8, 2003

Filed:

Mar 17, 2000

Appl. No.:

09/528088

Inventors:

Rajit Chandra - Cupertino CA
Joydeep Mitra - San Jose CA
Steven B. Parks - Santa Clara CA
Chandrasekhara Somanathan - Milpitas CA

Assignee:

Moscape, Inc. - Santa Clara CA

International Classification:

G06F 1750

US Classification:

716 5

Abstract:

Techniques for analyzing circuit designs based on assertions. An assertion is associated with a circuit structure from the circuit design. The assertion specifies a context of the circuit design in which the circuit structure is to be analyzed, an attribute associated with the circuit structure, and a constraint associated with the attribute. The present invention analyzes the circuit design based on assertions and checks to identify one or more instances of the circuit structure in the circuit design which do not satisfy the constraint specified in the assertion. An assertion may also indicate an action to be performed if the circuit structure does not satisfy the constraint specified in the assertion.

US Patent:

63014343, Oct 9, 2001

Filed:

Mar 22, 1999

Appl. No.:

9/274815

Inventors:

James McDiarmid - Pleasanton CA
Kristian E. Johnsgard - Los Gatos CA
Steven E. Parks - Fremont CA
Mark W. Johnsgard - Campbell CA

Assignee:

Mattson Technology, Inc. - Fremont CA

International Classification:

F26B 1900

US Classification:

392416

Abstract:

A thermal processing system and method for processing a semiconductor substrate. A lamp system radiates through a window to heat the substrate. A dual gas manifold provides purge gas through a top showerhead to prevent deposits on the window and provides gas through a lower showerhead to deposit a material on the substrate. A thin support and a radiative cavity with thin radiation shields is used to support and insulate the substrate. A peripheral heater also heats the edges to enhance uniformity. An opaque quartz liner is used to reduce contaminants and undesired deposits and simplify cleaning.

US Patent:

20160013025, Jan 14, 2016

Filed:

May 9, 2014

Appl. No.:

14/771525

Inventors:

- Fremont, CA, US
Steven Parks - Fremont CA, US
Martin Zucker - Orinda CA, US

Assignee:

Mattson Technology, Inc. - Fremont CA

International Classification:

H01J 37/32

Abstract:

Systems and methods for protecting vacuum seals in a plasma processing system are provided. The processing system can include a vacuum chamber defining a sidewall and an inductive coil wrapped around at least a portion of the sidewall. A vacuum seal can be positioned between the sidewall of the vacuum chamber and a heat sink. A thermally conductive bridge can be coupled between the sidewall and heat sink. Further, the thermally conductive bridge can be positioned relative to the vacuum seal such that the thermally conductive bridge redirects a conductive heat path from the sidewall or any heat source to the heat sink so that the heat path bypasses the vacuum seal.