Surya Teja Avirneni

US Patent:

20210149783, May 20, 2021

Filed:

Nov 10, 2020

Appl. No.:

17/094187

Inventors:

- McLean VA, US
Milind PATEL - Frisco TX, US
Surya AVIRNENI - Plano TX, US
Umang MISTRY - Plano TX, US

Assignee:

Capital One Services, LLC - McLean VA

International Classification:

G06F 11/30
G06F 11/07
G06F 11/32
G06F 11/36

Abstract:

Disclosed are hardware and techniques for building runbooks for new computer-implemented processes by correlating break events from the new processes with break events extant in existing runbooks for existing computer-implemented processes. In addition, fix events associated with the correlated break events are evaluated to determine the likelihood that they will be able to fix the error condition which caused the break event from the new process. The fix events are presented to a human operator who may select and test each fix event to determine if the error condition is directed and, if so, the correlated break event associated with the fix event are merged together and added to a new runbook for the new computer-implement process.