Sylvia J. Downing - El Dorado Hills CA, US Paul A. Jolly - Rescue CA, US Adam H. Wilen - Folsom CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 3/00
US Classification:
710 2
Abstract:
An embodiment of the present invention is a technique to map pins on an interface connector to signals for a digital display. A first group of signal traces maps transmitter differential pairs pins in a first group of lanes on the interface connector compatible with a first interface standard to video output points corresponding to video output signals of a first video port compatible with a second interface standard. A second group of signal traces maps presence detect pins in the first group of lanes on the interface connector to control signal points corresponding to control signals of the first video port compatible with the second interface standard. A third group of signal traces maps receiver differential pairs pins in the first group of lanes on the interface connector to video input points corresponding to video input signals of the first video port compatible with the second interface standard.
Monolithic Active Optical Cable Assembly For Data Device Applications And Various Connector Types
Thomas G. Willis - Portland OR, US Sylvia Downing - El Dorado Hills CA, US George Hayek - El Dorado Hills CA, US Jesse Chin - Saratoga CA, US William H. Wang - Pleasanton CA, US Darren S. Crews - Santa Clara CA, US Brian H. Kim - Fremont CA, US
A monolithic cable assembly includes a communication cable and cable connectors coupled to either end of the communication cable. The communication cable includes at least one optical communication channel. The cable connectors include a physical end connector for electrically coupling to a data device connector, optoelectronic components for converting data signals between an electrical realm and an optical realm, and a passively aligned integrated lens cover. The integrated lens cover includes at least one optical pathway for coupling optical data signals between the at least one optical communication channel and the optoelectronic components.
Maximino Vasquez - Fremont CA, US Todd M. Witter - Orangevale CA, US Sylvia J. Downing - El Dorado Hills CA, US Trudy Hoekstra - Latrobe CA, US Kristine M. Karnos - San Jose CA, US Zudan Shi - Mountain View CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 3/038 H04N 7/01
US Classification:
345204, 345211, 345213, 348446
Abstract:
A system, apparatus, method and article to switch between video display modes are described. The apparatus may include a graphics device to switch between a progressive mode and an interlaced mode to display media information using a single pixel clock frequency for both modes. Other embodiments are described and claimed.
Delivering Pixels Received At A Lower Data Transfer Rate Over An Interface That Operates At A Higher Data Transfer Rate
Paul Jolly - Rescue CA, US Sylvia Downing - El Dorado Hills CA, US Richard Jensen - Fair Oaks CA, US
International Classification:
G09G 5/00
US Classification:
345001100
Abstract:
A number of pixels are received at a pixel rate that corresponds to a lower data transfer rate. The received pixels are delivered for display on a display device, over an interface that operates at a higher data transfer rate. These pixels are delivered as part of a stream that includes one or more codes that have been inserted between each adjacent pair of pixels so that the pixels in the stream are still delivered at the pixel rate. Other embodiments are also described and claimed.
James Chapple - Chandler AZ, US Sylvia Downing - El Dorado Hills CA, US Scott Janus - Rocklin State CA, US Katen Shah - Folsom CA, US Patrick Smith - Cameron Park CA, US
International Classification:
G06F 15/16
US Classification:
709200000
Abstract:
A method, apparatus, and system are disclosed. In one embodiment the method comprises transmitting Peripheral Component Interconnect (PCI) Express protocol data on a first set of one or more lanes of a link and concurrently transmitting non-PCI Express protocol data on a second set of one or more lanes of the link.
Kouhei Kinoshita - Fukaya-shi, JP Hirofumi Kato - Fukaya-shi, JP Yasuhiro Yamashita - Fukaya-shi, JP Atsuo Okazaki - Saitama-shi, JP Maximino Vasquez - Fremont CA, US Todd Witter - Orangevale CA, US Sylvia Downing - El Dorado Hills CA, US Trudy Hoekstra - Latrobe CA, US Kristine Karnos - San Jose CA, US Zudan Shi - Mountain View CA, US
An apparatus which switches between video display modes, including a display panel having multiple display pixels formed in a matrix; a display controller coupled to the display panel and including a detector to detect a phase differential between received timing signals and output a synchronous determination signal, and a control signal generator coupled to the detector, the control signal generator to generate a first set of control signals corresponding to a first driving mode or a second set of control signals corresponding to a second driving mode in accordance with the synchronous determination signal, the first set of control signals to cause the display panel to display images in accordance with the first driving mode using a first set of selected display pixels, and the second set of control signals to cause the display panel to display images in accordance with the second driving mode using a second set of selected display pixels, with the second set having a number of selected display pixels different from the first set. Other embodiments are described and claimed.
Maximino Vasquez - Fremont CA, US Todd M. Witter - Orangevale CA, US Sylvia J. Downing - El Dorado Hills CA, US Trudy Hoekstra - Latrobe CA, US Kristine M. Karnos - San Jose CA, US Zudan Shi - Mountain View CA, US Kouhei Kinoshita - Fukaya-shi, JP Hirofumi Kato - Fukaya-shi, JP Yasuhiro Yamashita - Fukaya-shi, JP Atsuo Okazaki - Saitama-Shi, JP
International Classification:
H04N 7/01 G09G 3/36 G09G 5/00
US Classification:
348446, 345 11, 345 87, 348E07003
Abstract:
Techniques to switch between video display modes are described. An apparatus may include a graphics device to generate first synchronized timing signals with a first phase differential to indicate a first display mode for first display data, and to generate second synchronized timing signals with a second phase differential to indicate a second display mode for second display data. Other embodiments are described and claimed.
Delivering Pixels Received At A Lower Data Transfer Rate Over An Interface That Operates At A Higher Data Transfer Rate
Paul A. Jolly - Rescue CA, US Sylvia J Downing - El Dorado Hills CA, US Richard Jensen - Fair Oaks CA, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06T 1/20
US Classification:
345506
Abstract:
A number of pixels are received at a pixel rate that corresponds to a lower data transfer rate. The received pixels are delivered for display on a display device, over an interface that operates at a higher data transfer rate. These pixels are delivered as part of a stream that includes one or more codes that have been inserted between each adjacent pair of pixels so that the pixels in the stream are still delivered at the pixel rate. Other embodiments are also described and claimed.
University of California, Berkeley
Bachelors, Bachelor of Science, Electrical Engineering, Electrical Engineering and Computer Science, Computer Science
Skills:
Semiconductors Soc Embedded Systems Processors Asic Debugging Computer Graphics Ic Rtl Design Embedded Software Display Technology System Architecture Vlsi System on A Chip Integrated Circuits Application Specific Integrated Circuits Cmos Fpga Mixed Signal Analog
Sylvia Downing 1989 graduate of San Benito High School in Hollister, CA is on Classmates.com. See pictures, plan your class reunion and get caught up with Sylvia and other high ...