Tan Thanh Ho - Santa Clara CA Scott William Mitchell - San Jose CA Andrew Nakao - Fremont CA Ngo Thanh Ho - San Jose CA George Kwan - Sunnyvale CA
Assignee:
3Com Corporation - Santa Clara CA
International Classification:
G06F 126
US Classification:
700 22, 713340
Abstract:
A circuit and method thereof for indicating availability of a power source other than a first power source in a computer system peripheral device (such as a network adapter) connected to a plurality of power sources including. The circuit includes a circuit subassembly coupled to the first power source and a second power source. The circuit subassembly conducts current from the first power source when power is not available from the second power source and otherwise conducts current from the second power source. A first component is coupled to the circuit subassembly and conducts current when the second power source is available; otherwise, it does not conduct current. A second component is coupled to the circuit subassembly and to the first component. The second component conducts current when the first component is conducting current and otherwise does not conduct current. An output lead is coupled to the second component, and the output lead provides a signal indicating the second power source is available.
Power Management For A Peripheral Component Interconnect Environment With Auxiliary Power
Tan Thanh Ho - Santa Clara CA Scott William Mitchell - San Jose CA Andrew Nakao - Fremont CA Ngo Thanh Ho - San Jose CA George Kwan - Sunnyvale CA
Assignee:
3Com Corporation - Santa Clara CA
International Classification:
G06F 126
US Classification:
713340, 713310
Abstract:
A circuit and method thereof for arbitrating between a plurality of power sources connected to a computer system peripheral device. The circuit includes a first circuit subassembly coupled to a first power source and a second power source. The first circuit subassembly conducts current from the first power source when power is not available from the second power source, and otherwise conducts current from the second power source. The circuit also includes a second circuit subassembly coupled between the first circuit subassembly and a third power source. The second circuit subassembly conducts current from the third power source when the third power source is available and otherwise conducts current from the first circuit subassembly. The second circuit subassembly comprises a first component, a second component and a third component. The first component is coupled to the third power source and the first circuit subassembly.
Peripheral Device Power Management Circuit And Method For Selecting Between Main And Auxiliary Power Sources Or From Third Power Source
Tan Thanh Ho - Santa Clara CA Scott William Mitchell - San Jose CA Ryan Hirth - Windsor CA Ngo Thanh Ho - San Jose CA
Assignee:
3Com Corporation - Santa Clara CA
International Classification:
G06F 126
US Classification:
713340, 713310
Abstract:
A circuit and method thereof for arbitrating between a first power source and a second power source in a computer system peripheral device such as a network adapter (e. g. , a network interface card) that is connected to multiple power sources. The circuit includes a field effect transistor (FET) and a diode integral with the FET coupled between the first power source and the second power source. The FET is adapted to conduct current from the second power source when power is not available from the first power source, and to substantially prevent current from flowing from the first power source to the second power source. The circuit also includes a voltage regulator coupled between the first power source and the second power source, adapted to regulate voltage such that a voltage from the first power source and a voltage from the second power source are approximately equal.
Lucid Motors Mar 2019 - Jan 2020
Adas and Ad Sensor Verification Intern
Infineon Technologies Jun 2018 - Feb 2019
R and D Mechanical Engineering Intern
Spartan Superway Aug 2017 - May 2018
Spartan Superway Solar Futran Team
Spartan Superway May 2017 - Aug 2017
Summer Research Program Intern
Solano Community College May 2014 - Aug 2016
Mathematics Tutor
Education:
San Jose State University 2019 - 2022
Master of Science, Masters, Robotics, Engineering, Mechatronics
San Jose State University 2016 - 2018
Bachelor of Engineering, Bachelors, Mechanical Engineering
Solano Community College 2014 - 2016
Armijo High School 2011 - 2014
San Jose State University 2010 - 2010
Master of Science, Masters
Skills:
Microsoft Office Leadership Robotics Management Basic Html Arduino C/C++ Public Speaking Process Improvement Quad Copters Openpilot Autocad Mechanical Ptc Creo Matlab Ansys Workbench Labview Ansys Fea Solidworks Research and Development Ni Labview Mathlab Computer Aided Design Fluid Mechanics