The present invention is a method of surface preparation and imaging for integrated circuits. First, a substrate is selected and an opening is cut in the substrate of a sufficient size to fit an integrated circuit to be analyzed. A second substrate is then selected. An adhesive film is applied to the top surface of the first substrate, the adhesive film having adhesive on both sides and covering the opening on the first substrate. An integrated circuit is then inserted into the opening and attached to the bottom side of the adhesive film. Next, the first substrate and integrated circuit are bonded to the second substrate using the adhesive film. The bottom side of the first substrate and the integrated circuit are then thinned until the substrate wafer of the integrated circuit is completely removed. The bottom side of the first substrate and integrated circuit is then thinned to a user-definable level. A handle wafer is then attached to the bottom side of the first substrate.
Method Of Surface Preparation And Imaging For Integrated Circuits
Terrence Harold Brown - Harwood MD, US Larry Gene Ferguson - Baltimore MD, US
Assignee:
The United States of America as represented by the National Security Agency - Washington DC
International Classification:
H01L 21/66
US Classification:
438 14, 438 16, 438459
Abstract:
The present invention is a method of surface preparation and imaging for integrated circuits. First, a substrate is selected and an opening is cut in the substrate of a sufficient size to fit an integrated circuit to be analyzed. A second substrate is then selected. An adhesive film is applied to the top surface of the first substrate, the adhesive film having adhesive on both sides and covering the opening on the first substrate. An integrated circuit is then inserted into the opening and attached to the bottom side of the adhesive film. Next, the first substrate and integrated circuit are bonded to the second substrate using the adhesive film. The bottom side of the first substrate and the integrated circuit are then thinned until the substrate wafer of the integrated circuit is completely removed. Finally, an analytical imaging technique is performed on the integrated circuit from the bottom side of the first substrate.
System And Methods For Tracking Central Office Equipment And Inventory Records
Terrence A. Brown - Burtonsville MD, US Reginald Waters - Washington DC, US
International Classification:
G09G005/00
US Classification:
345/775000
Abstract:
A system and methods for tracking central office equipment and inventory records comprised of a series of modules to provide access to link drawings, racks and equipment across an entire network infrastructure. The system and methods provide a user the ability to view equipment, group equipment, and search for equipment and available rack space. Additionally, the central office equipment and inventory records can be compiled into reports for engineering, planning and analysis.
Process And Method For A Dynamic Rack Creator And Editor
Terrence Brown - Burtonsville MD, US Reginald Waters - Washington DC, US Floyd Pinder - Columbia MD, US
International Classification:
G06F019/00
US Classification:
700/097000
Abstract:
A process and method for an automated rack creator of network equipment based upon input of data to automatically scan a database server to acquire images and/or create images to determine the correct placement in the visual representation of the creation and update of a network rack and equipment dynamically (or in real-time) based upon coding and mathematical equations. The process provides the user a series of input methods or procedures to create, edit and view racks and equipment for the networking and telecommunications industries. The visual representation of the racks provides non-technical personnel with a tool to identify and provide input methods, eliminating the need to visit these networking and telecommunications rooms or offices.
Terrence Archer Brown - Laurel MD, US Brandon Archer Brown - Laurel MD, US
International Classification:
H04R 1/10 A45C 13/10 A45C 11/24
Abstract:
A headphone device case, in particular, a dual use case that can be used as both a standard headphone case and a component for personalization of the headphone casing.
Jun 2013 to 2000 Calibration Repair TechnicianAdecco/ATC Logistics Memphis, TN Oct 2012 to May 2013 Electronics TechnicianJabil Circuit Memphis, TN Mar 2009 to Jan 2011 Diagnostics Engineering TechnicianSolectron/Flextronics Memphis, TN Oct 2006 to Sep 2008 Laptop Repair Technician/Assistant Team Lead/ Q.AIntersky Precision Instruments Memphis, TN Mar 2005 to Feb 2006 Instruments Engineering Technician / Metrology Technician
Education:
The University of Southern Mississippi Hattiesburg, MS May 2003 B.S. in Electronics Engineering TechnologyMississippi Delta Community College Moorhead, MS May 2000 A.A.S. in Electronics Technology
Aug 2009 to 2000 Science Instructor/ Administrative InternCourtland High School Fredericksburg, VA Jun 2014 to Aug 2014 Administrative InternSpotsylvania County Schools Fredericksburg, VA Aug 2007 to Jun 2009 Biology InstructorCarnage Middle School Raleigh, NC Aug 2000 to Jun 2007 Science InstructorI.D.E.A. Public Charter High School Washington, DC Jul 1998 to Jun 2000 Science Department & Technology DirectorArsenal Technical High School Indianapolis, IN Aug 1996 to Jun 1998 Biology & Chemistry Instructor
Education:
Jones International University Denver, CO 2011 Master of Education in Higher Education Leadership and AdministrationPurdue University Indianapolis, IN 1994 Bachelor of Arts in Biology
Skills:
*Extensive experience performing varied duties in middle and secondary school environments o Instructor/Supervisor Performance Evaluator o Character Development o Budgeting o Community Leader/Mentor o Administration Support Excellent writing and verbal communicator; substantial experience interacting with students, parents and peers Expertise in using a variety of software applications such as Microsoft Office Suite
Thrive DC Executive chef 2009 to 2000Tricon Institute Washington, DC 2006 to 2009 Head ChefIngle side At Rockcreek Washington, DC 2001 to 2005 Executive chefNIH corporate building Sodexho Marriot Bethesda, MD 1998 to 2001 Assistant food service DirectorRing house /Hebrew Home of greater Washington Rockville, MD 1991 to 1998 Head chef /Production manager
Feb 2012 to 2000 Document SpecialistOmniplex Chantilly, VA Feb 2011 to Feb 2012 Field Training Officer (F.T.O.)Aecom McLean, VA Apr 2010 to Feb 2011 Custodial WorkerVolkswagen Waldorf, MD Apr 2008 to Sep 2008 Sales Consultant
Education:
Thomas Stone High School 2003 to 2007 Education and Certifications
Virginia Polytechnic Institute and State University, 1984; Virginia Polytechnic Institute and State University, 1984; Virginia Polytechnic Institute and State University, 1985; Virginia Polytechnic Institute and State University, 1985
Eric Langton Elementary School Maple Ridge Saudi Arabia 1982-1990, Lloyd George Elementary School Kamloops Saudi Arabia 1990-1991, John Peterson Junior High School Kamloops Saudi Arabia 1991-1994
Community:
Peter Kertesz, Morley Weinberg, Gilbert Lee, Sid Weinrib