Terry L Hendricks

US Patent:

44939396, Jan 15, 1985

Filed:

Oct 31, 1983

Appl. No.:

6/547066

Inventors:

T. Allen Blaske - Plano TX
Terry J. Hendricks - Garland TX

Assignee:

Varo, Inc. - Garland TX

International Classification:

H01L 3528

US Classification:

136212

Abstract:

A method and apparatus for fabricating a thermoelectric device includes forming a matrix board (12) with an array of orifices (100) formed therein. A plurality of P-type thermoelements (96) are formed and then a vacuum chuck (92) is utilized to dispose alternating ones of the elements (96) into the alternating ones of the orifices (100). A plurality of N-type elements (108) is formed and a vacuum chuck (104) is utilized to dispose alternating ones of the elements (108) into the remaining orifices (100) of the matrix (12). This forms an assembled array (52). A plurality of conductive tabs (114) is placed onto the P-type elements (98) and N-type elements (108) by a vacuum chuck (116). A second set of conductive tabs (120) is disposed on the opposite side of the assembled array by a vacuum chuck (124). A solder flow oven (54) and a solder flow oven (76) are utilized to reflow the solder on the tabs between the two operations.

US Patent:

46878793, Aug 18, 1987

Filed:

Apr 25, 1985

Appl. No.:

6/727341

Inventors:

Terry J. Hendricks - Garland TX

Assignee:

Varo, Inc. - Garland TX

International Classification:

H01L 3528

US Classification:

136212

Abstract:

A thermoelectric unit is disclosed having superposed PN semiconductor thermoelectric stages (10, 12) thermally and electrically connected together by a planar ceramic coupler (14) therebetween. The PN semiconductor blocks (16, 18) of each stage are connected by metallic bridging elements (20), which bridging elements are soldered to isolated metallized areas (40) on each face surface of the ceramic coupler (14) to thereby form a thermal path between the stages. Each stage further includes power source tabs (22,24; 26,28), the tabs (26,28) of one stage receiving power from the other stage through electrically conductive metallized edge paths (42, 44) on the ceramic coupler (14). This forms an interstage connection for connecting the PN semiconductor blocks of the one stage to the PN semiconductor blocks of the other stage.