Thomas T Cho

US Patent:

6363624, Apr 2, 2002

Filed:

Nov 21, 2000

Appl. No.:

09/721060

Inventors:

Lily L. Pang - Fremont CA
Thomas K. Cho - Palo Alto CA
Tetsuya Ishikawa - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

F26B 1900

US Classification:

34 85, 34 91, 34229, 20429807

Abstract:

An apparatus for distributing a cleaning gas to a semiconductor substrate processing chamber. The apparatus comprises a feed block disposed on top of the processing chamber and a support block disposed over the feed block. The feed block and the support block slidably interfit and are axially moveable with respect to one another.

US Patent:

6517634, Feb 11, 2003

Filed:

Feb 28, 2001

Appl. No.:

09/797161

Inventors:

Lily L. Pang - Fremont CA
Thomas K. Cho - Palo Alto CA
Tetsuya Ishikawa - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

C23C 16000

US Classification:

118715, 16235, 16239, 16241, 49254, 49257, 49258

Abstract:

A semiconductor substrate processing chamber is disclosed generally comprising a chamber body that has a semiconductor substrate support assembly disposed in the chamber body. A lid assembly is movably coupled to the chamber body via a dual pivot hinge assembly. The hinge assembly provides two pivot points that minimize the abrasion and pinching of an o-ring disposed between the lid assembly and the chamber body upon closing of the lid assembly.

US Patent:

6523563, Feb 25, 2003

Filed:

Feb 28, 2001

Appl. No.:

09/797219

Inventors:

Thomas Cho - Palo Alto CA
Robert J. Navasca - Redwood City CA
Tetsuya Ishikawa - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

F16L 3500

US Classification:

137338, 137377, 137382, 118728

Abstract:

An apparatus for providing facilities gas lines to a plurality of processing chambers. The apparatus comprises a rack having at least one modular gas control panel coupled thereon. A plurality of gas control panel feeds is coupled between the facilities gas lines and at least one gas control panel. Process gases are provided to individual chambers by a plurality of chamber gas lines are respectively coupled between at least one gas control panel and the plurality of processing chambers.

US Patent:

6552580, Apr 22, 2003

Filed:

Apr 27, 2000

Appl. No.:

09/559498

Inventors:

Christopher D. Nilson - San Jose CA
Thomas B. Cho - Alameda CA

Assignee:

Level One Communications Inc. - Sacramento CA

International Classification:

H03K 522

US Classification:

327 66, 327 65, 327562, 327563

Abstract:

A multistage analog circuit for independently controlling a bias current in each stage of the multistage analog circuit having an input stage, an intermediate stage, and an output stage, includes a first current source which controls the input stage of the circuit, a second current source which controls the intermediate stage of the circuit, and a third current source which controls the output stage of the circuit. The bias current in each stage of the circuit is set by the first, second, and third current sources. An output voltage of the circuit is capable of remaining the same when the first current source is changed to affect an input transconductance of the circuit.

US Patent:

6572708, Jun 3, 2003

Filed:

Feb 28, 2001

Appl. No.:

09/797214

Inventors:

Rudolf Gujer - Saratoga CA
Thomas K. Cho - Palo Alto CA
Lily L. Pang - Fremont CA
Michael P. Karazim - San Jose CA
Tetsuya Ishikawa - Santa Clara CA

Assignee:

Applied Materials Inc. - Santa Clara CA

International Classification:

H01L 2168

US Classification:

118728, 15634551, 15634554, 118500

Abstract:

A modular lift-pin assembly comprises a lift-pin having a distal end and a connector having a lift-pin end and an actuator end. The lift-pin end of the connector is coupled to the distal end of the lift-pin and an actuator pin is then coupled to the actuator end of the connector to actuate the lift-pin through the connector.

US Patent:

6656286, Dec 2, 2003

Filed:

Feb 2, 2001

Appl. No.:

09/776002

Inventors:

Thomas K. Cho - Palo Alto CA
Tetsuya Ishikawa - Santa Clara CA

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 2100

US Classification:

118728, 118725, 118500, 156915, 15634551, 15634552

Abstract:

A workpiece support having dichotomy of thermal paths therethrough is provided for controlling the temperature of a workpiece support thereon. In one embodiment, a workpiece support includes a platen body having a plug centrally disposed in a workpiece support surface of the platen body. A lower surface of the plug defines a void between the plug and a bottom of the bore. The void creates a dichotomy of thermal paths through the platen body thus controlling the temperature of a wafer support surface. Alternatively, the plug and platen body may be fabricated from materials having different rates of thermal conductivity to created the dichotomy of thermal paths in addition to or in absence of the void.

US Patent:

6735418, May 11, 2004

Filed:

Mar 16, 2000

Appl. No.:

09/527314

Inventors:

Donald E. MacNally - San Francisco CA
Thomas B. Cho - Alameda CA

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H04B 144

US Classification:

455 78, 455 80, 455 82

Abstract:

An antenna interface for a Time Division Duplex (TDD) radio transceiver allows a transceiver to be attached to an antenna/filter without the need for an antenna switch. The antenna interface includes a single Balun circuit to convert a single-ended signal to/from differential signals, and a single impedance matching circuit to match an impedance at an output of the single Balun circuit with an input impedance of a Low Noise Amplifier (LNA) of a receiver and to provide an output impedance of a Power Amplifier (PA) of a transmitter. The single impedance matching circuit is coupled to both the LNA and the PA. The LNA and the PA are based on CMOS technology and made within a single integrated circuit.

US Patent:

6776875, Aug 17, 2004

Filed:

Feb 28, 2001

Appl. No.:

09/797217

Inventors:

Rudolf Gujer - Saratoga CA
Thomas K. Cho - Palo Alto CA
Tetsuya Ishikawa - Santa Clara CA

Assignee:

Applied Materials Inc. - Santa Clara CA

International Classification:

C23F 100

US Classification:

15634551, 118715, 118728, 118733, 15634523

Abstract:

A semiconductor wafer processing substrate support assembly, comprises a substrate support platform having a centrally disposed recess, coupled to a base disposed above the centrally disposed recess, a plate disposed above the base, and a substrate support disposed above the plate. The substrate support assembly further comprises a plurality of o-rings having a plurality of lobes, wherein a first lobed o-ring of the plurality of lobed o-rings is disposed between the support platform and the base, a second lobed o-ring is disposed between the base and the plate, and a third lobed o-ring is disposed between the plate and the substrate support. Moreover, the plurality of lobed o-rings are utilized in the support assembly for reducing the number of o-rings required in the support assembly.