Timothy C Cramer

US Patent:

61956767, Feb 27, 2001

Filed:

Jan 11, 1993

Appl. No.:

8/003000

Inventors:

George A. Spix - Eau Claire WI
Diane M. Wengelski - Eau Claire WI
Stuart W. Hawkinson - Eau Claire WI
Mark D. Johnson - Eau Claire WI
Jeremiah D. Burke - Eau Claire WI
Keith J. Thompson - Eau Claire WI
Gregory G. Gaertner - Eau Claire WI
Giacomo G. Brussino - Eau Claire WI
Richard E. Hessel - Altoona WI
David M. Barkai - Eau Claire WI
Steve S. Chen - Chippewa Falls WI
Steven G. Oslon - Chippewa Falls WI
Robert E. Strout - Livermore CA
Jon A. Masamitsu - Livermore CA
David M. Cox - Livermore CA
Linda J. O'Gara - Livermore CA
Kelly T. O'Hair - Livermore CA
David A. Seberger - Livermore CA
James C. Rasbold - Livermore CA
Timothy J. Cramer - Pleasanton CA
Don A. Van Dyke - Pleasanton CA
Ashok Chandramouli - Fremont CA

Assignee:

Silicon Graphics, Inc. - Mountain View CA

International Classification:

G06F 946

US Classification:

709107

Abstract:

An integrated software architecture for a highly parallel multiprocessor system having multiple tightly-coupled processors that share a common memory efficiently controls the interface with and execution of programs on such a multiprocessor system. The software architecture combines a symmetrically integrated multithreaded operating system and an integrated parallel user environment. The operating system distributively implements an anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources. The user environment provides a common visual representation for a plurality of program development tools that provide compilation, execution and debugging capabilities for multithreaded user programs and assumes parallelism as the standard mode of operation.

US Patent:

51797020, Jan 12, 1993

Filed:

Jun 11, 1990

Appl. No.:

7/537466

Inventors:

George A. Spix - Eau Claire WI
Diane M. Wengelski - Eau Claire WI
Stuart W. Hawkinson - Eau Claire WI
Mark D. Johnson - Eau Claire WI
Jeremiah D. Burke - Eau Claire WI
Keith J. Thompson - Eau Claire WI
Gregory G. Gaertner - Eau Claire WI
Giacomo G. Brussino - Eau Claire WI
Richard E. Hessel - Altoona WI
David M. Barkai - Eau Claire WI
Steve S. Chen - Chippewa Falls WI
Steven G. Oslon - Chippewa Falls WI
Robert E. Strout - Livermore CA
Jon A. Masamitsu - Livermore CA
David M. Cox - Livermore CA
Linda J. O'Gara - Livermore CA
Kelly T. O'Hair - Livermore CA
David A. Seberger - Livermore CA
James C. Rasbold - Livermore CA
Timothy J. Cramer - Pleasanton CA
Don A. Van Dyke - Pleasanton CA
Ashok Chandramouli - Fremont CA

Assignee:

Supercomputer Systems Limited Partnership - Eau Claire WI

International Classification:

G06F 946

US Classification:

395650

Abstract:

An integrated software architecture for a highly parallel multiprocessor system having multiple tightly-coupled processors that share a common memory efficiently controls the interface with and execution of programs on such a multiprocessor system. The software architecture combines a symmetrically integrated multithreaded operating system and an integrated parallel user environment. The operating system distributively implements an anarchy-based scheduling model for the scheduling of processes and resources by allowing each processor to access a single image of the operating system stored in the common memory that operates on a common set of operating system shared resources. The user environment provides a common visual representation for a plurality of program development tools that provide compilation, execution and debugging capabilities for multithreaded user programs and assumes parallelism as the standard mode of operation.