Timothy Allen Potter

US Patent:

8335951, Dec 18, 2012

Filed:

May 6, 2010

Appl. No.:

12/775213

Inventors:

Donald Becker - Bradenton FL, US
Timothy Steven Potter - Bradenton FL, US
Bruce Montgomery, Jr. - Venice FL, US
Dave Dopson - Seattle WA, US

Assignee:

UTC Fire & Security Americas Corporation, Inc. - Bradenton FL

International Classification:

G11C 29/04

US Classification:

714718, 714763

Abstract:

A method for verifying memory device integrity includes identifying at least one memory block corresponding to at least one memory location within a memory device. The memory block is associated with a prior checksum. It is determined whether the first memory block is designated read-only. A current checksum is calculated based at least in part on data within the memory block. When the first memory block is designated read-only, and the prior checksum represents expected data within the first memory block, it is determined whether the current checksum is equal to the prior checksum. When the current checksum is not equal to the prior checksum, a verification failure for the first memory block is indicated via a notification interface. A system for verifying memory device integrity is also disclosed.

US Patent:

8370689, Feb 5, 2013

Filed:

May 6, 2010

Appl. No.:

12/775205

Inventors:

Timothy Steven Potter - Bradenton FL, US
Donald Becker - Bradenton FL, US
Bruce Montgomery, Jr. - Venice FL, US
Dave Dopson - Seattle WA, US

Assignee:

UTC Fire & Security Americas Corporation, Inc. - Bradenton FL

International Classification:

G06F 11/00
G06F 11/22

US Classification:

714 49, 714 42, 714 54

Abstract:

A method and system for verifying memory device integrity includes identifying at least one memory block corresponding to at least one memory location within a memory device. The memory block is associated with a portion of a file and a checksum representing data within the memory block at a first time. Based at least in part on determining that the memory block is mapped to the same portion of the same file at a second time, it is indicated that the checksum represents expected data within the memory block. A system for verifying memory device integrity is also disclosed.

US Patent:

20120144151, Jun 7, 2012

Filed:

Dec 6, 2010

Appl. No.:

12/961097

Inventors:

Timothy Steven Potter - Bradenton FL, US
Donald Becker - Bradenton FL, US
Bruce Montgomery, JR. - Venice FL, US

International Classification:

G06F 12/02

US Classification:

711172, 711E12002

Abstract:

A method for protecting memory segments of a memory device is provided. The method includes receiving, by a processor coupled to the memory device, a request to allocate memory from an application, being executed by the processor, wherein the request includes a requested memory size and allocating, by the processor, a portion of memory having a size greater than the requested memory size. The method also includes creating, by the processor, a permitted read counter associated with the allocated portion of memory, wherein the permitted read counter is initialized to an initial value, and determining, by the processor, whether access to the memory segment is permitted using the permitted read counter. A system for protecting memory segments of a memory device is also disclosed.

US Patent:

20120159085, Jun 21, 2012

Filed:

Dec 21, 2010

Appl. No.:

12/974587

Inventors:

Timothy Steven Potter - Bradenton FL, US
Donald Becker - Bradenton FL, US
Bruce Montgomery, JR. - Venice FL, US
Dave Dopson - Seattle WA, US

International Classification:

G06F 12/08

US Classification:

711143, 711E12017

Abstract:

A method for validating an eligibility for verification of a memory device within an embedded demand paged memory operating system environment is provided. The method includes receiving a request from an application being executed by a processor coupled to the memory device, the request to utilize at least one memory location. The method includes identifying, by the processor, at least one memory block corresponding to at least one memory location within the memory device, determining, by the processor, whether the at least one memory block is eligible for verification, and producing an eligibility result based on the determination by the processor. A system for validating an eligibility for verifying memory device integrity is also disclosed.