Timothy C Sutton

US Patent:

53172116, May 31, 1994

Filed:

Mar 5, 1993

Appl. No.:

8/026665

Inventors:

Dandas K. Tang - Tempe AZ
Timothy W. Sutton - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg IL

International Classification:

H03K 19173

US Classification:

307465

Abstract:

A buffer circuit for programming an I/O pin of a programmable logic device to function either as a normal I/O site, a power pin, or a ground pin has been provided. The I/O pin may be programmed by a user by simply placing first and second control signals in appropriate logic states. The buffer circuit also includes a tri-state circuit for providing tri-state outputs when functioning as a normal I/O site.

US Patent:

49704087, Nov 13, 1990

Filed:

Oct 30, 1989

Appl. No.:

7/428678

Inventors:

Carl C. Hanke - Mesa AZ
Carlos D. Obregon - Tempe AZ
Timothy W. Sutton - Mesa AZ

Assignee:

Motorola, Inc. - Schaumburg

International Classification:

H03K 1720
H03K 1722
H03K 17284
H03K 17687

US Classification:

3072723

Abstract:

The output signal of a CMOS power-on reset circuit changes state upon detecting a predetermined threshold of the power supply voltage during the start-up transient. During the power-up of the power supply voltage, the output signal of the power-on reset circuit ramps up with the power supply voltage until the latter reaches a first predetermined level whereat a control signal begins to track the increasing power supply voltage, less two diodes potentials. Upon reaching the turn-on potential of a transistor, the control signal activates an inverter to substantially reduce the output signal signifying that the power supply voltage level is sufficient for the operation of external circuitry. The output signal then disables the current flowing through the power-on reset circuit to save power consumption.