Todd M Bezenek

age ~61

from Milpitas, CA

Also known as:
  • Todd M Ezene
  • Zenek E Todd
Phone and address:
375 Lynn Ave, Milpitas, CA 95035
4082469134

Todd Bezenek Phones & Addresses

  • 375 Lynn Ave, Milpitas, CA 95035 • 4082469134
  • 889 Winchester Blvd, San Jose, CA 95128 • 4082469134
  • 1042 Mckenna Rd, Madison, WI 53719 • 6082781198 • 6082781228
  • 2121 University Ave, Madison, WI 53705 • 6082386390
  • 6120 Century Ave, Middleton, WI 53562 • 6088260199
  • Hillsboro, OR
  • Palo Alto, CA
  • Fargo, ND

Resumes

Todd Bezenek Photo 1

Consultant

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Location:
San Jose, CA
Industry:
Research
Work:
The Omnifid.us Project Jun 2012 - Apr 2014
Engineer

Quantum Jul 2010 - Aug 2012
Senior Systems Performance Engineer

Align Technology Oct 2009 - Feb 2010
Latency and Parallelism Consultant

Align Technology Mar 2007 - Jun 2009
Systems Performance Analyst

Align Technology Mar 2007 - Jul 2008
Senior Software Engineer and Performance Engineer
Education:
University of Wisconsin - Madison 1995 - 2001
Master of Science, Masters, Architecture
North Dakota State University 1992 - 1994
Master of Science, Masters, Electrical Engineering
North Dakota State University 1992
Bachelors, Bachelor of Science, Electrical Engineering, Computer Science
Fargo North High School
Skills:
Algorithms
C
Linux
Computer Architecture
C++
High Performance Computing
Databases
Windows
Java
Firmware
Engineering
Operating Systems
Embedded Systems
Processors
Research
Parallel Programming
Linux Kernel
Data Structures
File Systems
Solaris
Teaching
Compilers
Microcode
Group Theory
Complexity Theory
Machine Learning
Data Mining
Functional Programming
Computer Arithmetic
Proofreading
Mathematical Logic
High Performance Systems
Statistics
Analog Circuit Design
Solid State Physics
Low Power Systems
Finite Automata Theory
Data General Nova Assembly Language
Motorola 6811 Assembly Language
Motorola 6502 Assembly Langauge
Ibm 360/370 Assembly Langauge
Sparc Assembly Language
Mips Assembly Language
Simplescalar Assembly Langauge
Pcode
Ucode
Low Level Digital Circuit Design
Energy Aware Computation
Technical Editing
Computability Theory
Languages:
English
Todd Bezenek Photo 2

Todd Bezenek

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Location:
San Jose, California
Industry:
Wireless
Skills:
Reading
Teaching
Engineering
Research
C
C++
Windows
Hacking
Algorithms
Low-power Systems
Finite Automata Theory
Data Structures
QA
Science
Math
Art
Computer Architecture
High Performance Systems
Functional Programming
Parallel Programming
Compilers
Operating Systems
Linux
Data General Nova Assembly Language
Motorola 6811 Assembly Language
Motorola 6502 Assembly Langauge
IBM 360/370 Assembly Langauge
SPARC Assembly Language
MIPS Assembly Language
Simplescalar Assembly Langauge
PCode
UCode
Boolean Algebra
Decimal Algebra
Computer Arithmetic
Low-level Digital Circuit Design
Analog Circuit Design
Microcode
Databases
File Systems
Energy-Aware Computation
Solid State Physics
Java
Technical Editing
Proofreading
Mathematical Logic
Group Theory
Complexity Theory
Statistics
Computability Theory
Honor & Awards:
Two NSF Fellowships First Place in Several Programming Contests
Languages:
English
C
C++
FORTRAN
Java
R
Scripting (Various)

Us Patents

  • System And Method For Managing The Design And Configuration Of An Integrated Circuit Semiconductor Design

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  • US Patent:
    20080222580, Sep 11, 2008
  • Filed:
    Mar 9, 2007
  • Appl. No.:
    11/684156
  • Inventors:
    Soumya Banerjee - San Jose CA, US
    Todd Michael Bezenek - San Jose CA, US
    Clement Tse - Fremont CA, US
  • Assignee:
    MIPS TECHNOLOGIES, INC. - Mountain View CA
  • International Classification:
    G06F 17/50
  • US Classification:
    716 4, 716 18
  • Abstract:
    A system and methods that facilitate the design process and minimize the time and effort required to complete the design and fabrication of an integrated circuits (IC) are described. The system and method utilize a plurality of repositories, rules engines and design and verification tools to analyze the workload and automatically produce a hardened GDSII description or other representation of the device. The system and method securely maintains synthesizable RTL on a server in a data center while providing designers access to portions of the mechanism by way of a network portal.
  • Remote Interface For Managing The Design And Configuration Of An Integrated Circuit Semiconductor Design

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  • US Patent:
    20080222581, Sep 11, 2008
  • Filed:
    Mar 9, 2007
  • Appl. No.:
    11/684189
  • Inventors:
    Soumya Banerjee - San Jose CA, US
    Todd Michael Bezenek - San Jose CA, US
    Clement Tse - Fremont CA, US
  • Assignee:
    MIPS TECHNOLOGIES, INC. - Mountain View CA
  • International Classification:
    G06F 17/50
  • US Classification:
    716 4
  • Abstract:
    A software system for facilitating the design process and minimizing the time and effort required to complete the design and fabrication of an integrated circuits (IC) is described. The software system utilizes a data center having a plurality of repositories, rules engines and design and verification tools to automatically produce a hardened GDSII description or other representation of the device in response to the formation of a electronic license agreement. Designers select contractual terms for incorporating third party intellectual property and then design and initiate manufacture of the IC by way of a network portal.
  • Systems And Methods For Creating An Integrated Circuit With A Remote Device

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  • US Patent:
    20190392500, Dec 26, 2019
  • Filed:
    Aug 12, 2019
  • Appl. No.:
    16/538107
  • Inventors:
    - Cambridge, GB
    Todd Michael Bezenek - San Jose CA, US
    Clement Tse - Fremont CA, US
  • International Classification:
    G06Q 30/06
    G06F 17/50
    G06Q 50/18
  • Abstract:
    Systems and methods for using logic design processing to create an integrated circuit (IC). A method for creating an IC with a client device that is configured to perform all of the steps of receiving technology options and operating system options for the IC, selecting one of the technology options and one of the operating system options, receiving a subset of processor cores matching the selected technology option and the selected operating system option, identifying a particular processor core from among the subset of processor cores, customizing the particular processor core by adjusting at least one of default values for a system clock, a memory configuration, or a cache value based on the selected technology option to create a customized processor core configuration, presenting the customized processor core configuration in a graphical format and, in response, confirming the customized processor core configuration as a desired core configuration to be built, and sending device instructions to build an IC based on the desired core configuration.
  • Computer-Aided Design Of Integrated Circuits

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  • US Patent:
    20150154677, Jun 4, 2015
  • Filed:
    Feb 9, 2015
  • Appl. No.:
    14/616982
  • Inventors:
    - Cambridge, GB
    Todd Michael Bezenek - San Jose CA, US
    Clement Tse - Fremont CA, US
  • International Classification:
    G06Q 30/06
    G06F 17/50
    G06Q 50/18
  • Abstract:
    A software system for facilitating the design process and minimizing the time and effort required to complete the design and fabrication of an integrated circuits (IC) is described. The software system utilizes a data center having a plurality of repositories, rules engines and design and verification tools to automatically produce a hardened GDSII description or other representation of the device in response to the formation of a electronic license agreement. Designers select contractual terms for incorporating third party intellectual property and then design and initiate manufacture of the IC by way of a network portal.
Name / Title
Company / Classification
Phones & Addresses
Todd Bezenek
Principal
Computer Architecture
Architectural Services
889 S Winchester Blvd, San Jose, CA 95128

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Todd Bezenek


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