Sarah Bird - Plano TX, US Sundeep Chadha - Austin TX, US Maureen Davis - Round Rock TX, US Kirk Morrow - Round Rock TX, US Tung Pham - Austin TX, US
International Classification:
G01R 31/28 G06F 11/00
US Classification:
714741000
Abstract:
A method for verifying the equivalence of two representations of a stimulus pattern for testing a design is disclosed. The method includes receiving a base pattern file representing the stimulus pattern in a first file format. A derivative pattern file in a second file format is generated from the base pattern file. The derivative pattern file is parsed to create a first testing file in a third file format, and the first testing file is simulated against the design in a first simulation. Whether the first testing file passed the first simulation against the design is determined, and in response to determining that the first testing file does not pass the first simulation against the design, the base pattern file is parsed to create a second testing file in the third file format. The second testing file is simulated in a second simulation. Whether the second testing file passed the second simulation is determined, and, in response to determining that the second testing file passed the second simulation, a likely non-equivalence of the derivative pattern file and the base pattern file is indicated. In response to determining that the second testing file did not pass the second simulation, a likely equivalence of the derivative pattern file and the base pattern file is indicated.
Methods And Apparatus For Creating A Pending Write-Back Controller For A Cache Controller On A Packet Switched Memory Bus Employing Dual Directories
Bjorn Liencres - Palo Alto CA Douglas Lee - San Francisco CA Pradeep S. Sindhu - Mountain View CA Tung Pham - San Jose CA
Assignee:
Sun Microsystems, Inc. - Mountain View CA Xerox Corporation - Stamford CT
International Classification:
G06F 1208
US Classification:
395425
Abstract:
A write-back cache control system having a pending write-back cache controller in a multiprocessor cache memory structure. The processor subsystems in the multiprocessor system are coupled together using a high-speed synchronous packet switching bus called a memory bus. Each processor subsystem has an associated cache control system. When a processor's cache control system does not have a required memory location in the cache memory, it broadcasts a memory request packet across the memory bus for the required data. If an owned cache line is being replaced, the cache control system copies the old cache line data to the pending write-back cache controller which is responsible for the write-backs of owned cache lines to main memory. The cache control system then transfers ownership of the old replaced cache line to the pending write-back controller. When the cache control system receives the new cache line information from the memory bus, it immediately replaces the cache line and allows the processing to continue.
In-Memory Database (Imdb) Acceleration Through Near Data Processing
An accelerator is disclosed. The accelerator may include an on-chip memory to store a data from a database. The on-chip memory may include a first memory bank and a second memory bank. The first memory bank may store the data, which may include a first value and a second value. A computational engine may execute, in parallel, a command on the first value in the data and the command on the second value in the data in the on-chip memory. The on-chip memory may be configured to load a second data from the database into the second memory bank in parallel with the computation engine executing the command on the first value in the data and executing the command on the second value in the data.
Reactor System Coupled To An Energy Emitter Control Circuit
- Sunnyvale CA, US Tung Van Pham - San Jose CA, US Bryce H. Anzelmo - Mountain View CA, US Thomas Riso - Elizabeth CO, US
Assignee:
Lyten, Inc. - Sunnyvale CA
International Classification:
H01J 37/32 B01J 19/12 C01B 32/205 C01B 32/184
Abstract:
A microwave energy source that generates a microwave energy is disclosed. The microwave energy source has an on-state and an off-state. A control circuit is coupled to the microwave energy source and includes an output to generate a control signal that adjusts a pulse frequency of the microwave energy. A voltage generator applies a non-zero voltage to the microwave energy source during the off-state. A frequency and a duty cycle of the non-zero voltage is based on a frequency and a duty cycle of the control signal. A waveguide is coupled to the microwave energy source. The waveguide has a supply gas inlet that receives a supply gas, a reaction zone that generates a plasma, a process inlet that injects a raw material into the reaction zone, and an outlet that outputs a powder based on a mixture of the supply gas and the raw material within the plasma.
- Dallas TX, US Tung Pham - Dallas TX, US Kevin M. Ehringer - Dallas TX, US Billie Cottongim - Plano TX, US
International Classification:
G02B 6/38 G01M 11/08
Abstract:
The present disclosure includes systems and methods for testing bundles of fiber optic fibers, such as fiber optic trunk cables, for correct polarity of connections at each end of the bundle of fibers while preventing the fiber optic fibers from contacting any other components during testing. The systems include a processor, a plurality of signal generators interfaced with a plurality of signal generator ports, a sensor interfaced with a sensor input port, a first selector switch, and a display, the processor operable to stimulate the plurality of signal generators one at a time in a first sequence to produce a signal, the first sequence based on a position of the first selector switch, the processor further operable to cause the display to display an output of the sensor.
Automatically Modifying A Disrupted Pacing Plan For A Digital Content Distribution Campaign
- Menlo Park CA, US Tung Nhat Pham - Mountain View CA, US
International Classification:
G06Q 30/02
Abstract:
The present disclosure is directed toward systems, computer-readable media, and methods that automatically modify a pacing plan for a digital content distribution campaign, which provides digital content to client computing devices based on the pacing plan. For instance, the systems disclosed herein can automatically detect when a service error causes a digital content distribution campaign to deviate from the pacing plan. In response, the disclosed systems can generate a new pacing plan based on the actual allocated budget at the conclusion of the service error. In particular, the disclosed systems can generate a new pacing plan that enables the digital content distribution campaign to efficiently maximize the remaining resources allocated to the digital content distribution campaign.
- Dallas TX, US Tung Pham - Dallas TX, US Kevin M. Ehringer - Dallas TX, US Billie Cottongim - Plano TX, US
International Classification:
G02B 6/38 G01M 11/08
Abstract:
The present disclosure includes systems and methods for testing bundles of fiber optic fibers, such as fiber optic trunk cables, for correct polarity of connections at each end of the bundle of fibers while preventing the fiber optic fibers from contacting any other components during testing. The systems include a processor, a plurality of signal generators interfaced with a plurality of signal generator ports, a sensor interfaced with a sensor input port, a first selector switch, and a display, the processor operable to stimulate the plurality of signal generators one at a time in a first sequence to produce a signal, the first sequence based on a position of the first selector switch, the processor further operable to cause the display to display an output of the sensor.
- Dallas TX, US Tung Pham - Dallas TX, US Kevin M. Ehringer - Dallas TX, US Billie Cottongim - Plano TX, US
International Classification:
G02B 6/38 G01M 11/08
Abstract:
The present disclosure includes systems and methods for testing bundles of fiber optic fibers, such as fiber optic trunk cables, for correct polarity of connections at each end of the bundle of fibers while preventing the fiber optic fibers from contacting any other components during testing. The systems include a processor, a plurality of signal generators interfaced with a plurality of signal generator ports, a sensor interfaced with a sensor input port, a first selector switch, and a display, the processor operable to stimulate the plurality of signal generators one at a time in a first sequence to produce a signal, the first sequence based on a position of the first selector switch, the processor further operable to cause the display to display an output of the sensor.
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