Tung Cao Pham

US Patent:

54349931, Jul 18, 1995

Filed:

Nov 9, 1992

Appl. No.:

7/973309

Inventors:

Bjorn Liencres - Palo Alto CA
Douglas Lee - San Francisco CA
Pradeep S. Sindhu - Mountain View CA
Tung Pham - San Jose CA

Assignee:

Sun Microsystems, Inc. - Mountain View CA
Xerox Corporation - Stamford CT

International Classification:

G06F 1208

US Classification:

395425

Abstract:

A write-back cache control system having a pending write-back cache controller in a multiprocessor cache memory structure. The processor subsystems in the multiprocessor system are coupled together using a high-speed synchronous packet switching bus called a memory bus. Each processor subsystem has an associated cache control system. When a processor's cache control system does not have a required memory location in the cache memory, it broadcasts a memory request packet across the memory bus for the required data. If an owned cache line is being replaced, the cache control system copies the old cache line data to the pending write-back cache controller which is responsible for the write-backs of owned cache lines to main memory. The cache control system then transfers ownership of the old replaced cache line to the pending write-back controller. When the cache control system receives the new cache line information from the memory bus, it immediately replaces the cache line and allows the processing to continue.

US Patent:

20230027648, Jan 26, 2023

Filed:

Oct 29, 2021

Appl. No.:

17/515379

Inventors:

- Suwon-si, KR
Tung PHAM - San Jose CA, US
Jaemin JUNG - San Jose CA, US

International Classification:

G06F 16/2453
G06F 16/2455
G06F 16/248
G06F 12/0882

Abstract:

An accelerator is disclosed. The accelerator may include an on-chip memory to store a data from a database. The on-chip memory may include a first memory bank and a second memory bank. The first memory bank may store the data, which may include a first value and a second value. A computational engine may execute, in parallel, a command on the first value in the data and the command on the second value in the data in the on-chip memory. The on-chip memory may be configured to load a second data from the database into the second memory bank in parallel with the computation engine executing the command on the first value in the data and executing the command on the second value in the data.

US Patent:

20210057191, Feb 25, 2021

Filed:

Sep 30, 2020

Appl. No.:

17/039736

Inventors:

- Sunnyvale CA, US
Tung Van Pham - San Jose CA, US
Bryce H. Anzelmo - Mountain View CA, US
Thomas Riso - Elizabeth CO, US

Assignee:

Lyten, Inc. - Sunnyvale CA

International Classification:

H01J 37/32
B01J 19/12
C01B 32/205
C01B 32/184

Abstract:

A microwave energy source that generates a microwave energy is disclosed. The microwave energy source has an on-state and an off-state. A control circuit is coupled to the microwave energy source and includes an output to generate a control signal that adjusts a pulse frequency of the microwave energy. A voltage generator applies a non-zero voltage to the microwave energy source during the off-state. A frequency and a duty cycle of the non-zero voltage is based on a frequency and a duty cycle of the control signal. A waveguide is coupled to the microwave energy source. The waveguide has a supply gas inlet that receives a supply gas, a reaction zone that generates a plasma, a process inlet that injects a raw material into the reaction zone, and an outlet that outputs a powder based on a mixture of the supply gas and the raw material within the plasma.

US Patent:

20190102807, Apr 4, 2019

Filed:

Oct 2, 2017

Appl. No.:

15/723119

Inventors:

- Menlo Park CA, US
Tung Nhat Pham - Mountain View CA, US

International Classification:

G06Q 30/02

Abstract:

The present disclosure is directed toward systems, computer-readable media, and methods that automatically modify a pacing plan for a digital content distribution campaign, which provides digital content to client computing devices based on the pacing plan. For instance, the systems disclosed herein can automatically detect when a service error causes a digital content distribution campaign to deviate from the pacing plan. In response, the disclosed systems can generate a new pacing plan based on the actual allocated budget at the conclusion of the service error. In particular, the disclosed systems can generate a new pacing plan that enables the digital content distribution campaign to efficiently maximize the remaining resources allocated to the digital content distribution campaign.