Tyson R Mcguffin

US Patent:

7139986, Nov 21, 2006

Filed:

Mar 11, 2004

Appl. No.:

10/798038

Inventors:

Tyson R. McGuffin - Fort Collins CO, US
Thomas W. Chen - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 17/50

US Classification:

716 2, 716 4, 716 5

Abstract:

Systems and methods associated with costs of a selected objective are disclosed. One embodiment of a system may comprise a constraint evaluator that evaluates a value set associated with a plurality of objectives to determine if a non-selected objective has violated at least one constraint. The system may further comprise a cost function configurable to evaluate a cost associated with the value set at a first cost range if the value set violates the at least one constraint associated with the non-selected objective, and to evaluate a cost associated with the value set at a second cost range associated with the selected objective if the value set does not violate the at least one constraint associated with the non-selected objective, such that the second cost range is different from the first cost range.

US Patent:

20040019473, Jan 29, 2004

Filed:

Jul 24, 2002

Appl. No.:

10/205332

Inventors:

David Burden - Fort Collins CO, US
Tyson McGuffin - Fort Collins CO, US

International Classification:

G06F017/50

US Classification:

703/014000

Abstract:

A process for processing a circuit design. One or more critical design paths of the circuit design are determined. These paths may for example be determined relative to timing and/or current utilization. Design elements of the paths may be grouped by type (e.g., FETs, wires). The circuit design may be optimized by processing a reduced set of design elements as determined by the critical paths and grouping. Optimization may include modifying FET design element width, or a routing path of a wire design element, along a critical path of the design, and comparing the new optimization relative to preselected design goals such as timing and power consumption.

US Patent:

20050021238, Jan 27, 2005

Filed:

Jul 21, 2003

Appl. No.:

10/624266

Inventors:

Tyson McGuffin - Fort Collins CO, US
Thomas Chen - Fort Collins CO, US
Dave Anderson - Fort Collins CO, US
David Burden - Fort Collins CO, US

International Classification:

G06F019/00
G01N033/48
G01N033/50

US Classification:

702020000

Abstract:

The convergence speed of a computer-implemented genetic optimization process is improved through the correction of child chromosomes containing undesirable gene combinations. Undesirable gene combinations may be identified through application of heuristic techniques, statistical techniques, or a combination of the two.

US Patent:

20050034089, Feb 10, 2005

Filed:

Aug 6, 2003

Appl. No.:

10/635283

Inventors:

Tyson McGuffin - Fort Collins CO, US
Thomas Chen - Fort Collins CO, US

International Classification:

G06F009/45

US Classification:

716005000

Abstract:

Systems and methods are provided that can be utilized to estimate power associated with a circuit design. The estimated power is determined by evaluating a functional relationship of estimated power based on calculated transistor gate area. One or more power coefficients can be employed with transistor gate area calculations of a circuit design to compute relative power estimates of one or more circuit design sizing instances.

US Patent:

20050050494, Mar 3, 2005

Filed:

Sep 2, 2003

Appl. No.:

10/653328

Inventors:

Tyson McGuffin - Fort Collins CO, US
Thomas Chen - Fort Collins CO, US
Samuel Naffziger - Fort Collins CO, US
Eric Fetzer - Longmont CO, US

International Classification:

G06F009/45

US Classification:

716005000

Abstract:

Systems and methods are provided that can be utilized to estimate power associated with a circuit design. The estimated power is determined by employing power characterizations to determine power consumption associated with non-conventional circuits in the circuit design. The power characterizations can be determined prior to circuit design timing analysis, stored and utilized during circuit design timing analysis. The power estimates associated with the non-conventional circuits can be added to power estimates associated with the conventional circuits of the circuit design to compute a power associated with the circuit design.

US Patent:

20050050495, Mar 3, 2005

Filed:

Sep 2, 2003

Appl. No.:

10/653650

Inventors:

Tyson McGuffin - Fort Collins CO, US
Thomas Chen - Fort Collins CO, US
David Burden - Fort Collins CO, US

International Classification:

G06F009/45

US Classification:

716005000

Abstract:

Systems and methods are provided that can be utilized to estimate power associated with a circuit design. The estimated power is determined by employing power characterizations associated with dynamic and static power related parameters of a circuit design. The power characterizations can be determined prior to circuit design optimizations, stored and utilized during circuit design optimizations.

US Patent:

20050071302, Mar 31, 2005

Filed:

Sep 29, 2003

Appl. No.:

10/675883

Inventors:

Tyson McGuffin - Fort Collins CO, US
Thomas Chen - Fort Collins CO, US
Dave Anderson - Fort Collins CO, US

International Classification:

G06N003/12
G06F015/18
G06N003/00

US Classification:

706013000

Abstract:

The iterations required for the convergence of a computer-implemented optimization process based on a genetic model are reduced, and the flexibility of the process is increased through mapping multiple characteristics of a system to be optimized to a single gene within a chromosome.

US Patent:

20050159897, Jul 21, 2005

Filed:

Jan 21, 2004

Appl. No.:

10/761832

Inventors:

David Anderson - Fort Collins CO, US
Tyson McGuffin - Fort Collins CO, US
Thomas Chen - Fort Collins CO, US

International Classification:

G06N003/00
G06N003/12
G06F015/18
G06F019/00
G01N033/48
G01N033/50

US Classification:

702020000, 706013000

Abstract:

Systems and methods are disclosed for selecting a value set associated with a set of parameters. Real costs are generated for each of a plurality of first value sets represented as a plurality of real chromosomes. Speculative costs are generated for each of a plurality of second value sets represented as a plurality of speculative chromosomes that represent value set variations of the first value sets. At least one subsequent generation of speculative chromosomes is generated until a predetermined validation criteria has been satisfied. Upon achieving the predetermined validation criteria, real costs are generated for at least one speculative chromosome of the plurality of speculative chromosomes.