Vinay Kanakadandila

age ~30

from Overland Park, KS

Vinay Kanakadandila Phones & Addresses

  • Overland Park, KS
  • Westlake, OH
  • Plano, TX
  • Houston, TX

Work

  • Company:
    Digital image processing
    Sep 2013
  • Position:
    Team lead, sub-module coding and debugger

Education

  • School / High School:
    Cullen College of Engineering, University of Houston- Houston, TX
    2012
  • Specialities:
    Master of Science in Electrical Engineering

Skills

Logic Design • Programming Languages (C/C++ • Perl) • HDLs(VHDL • Verilog) • Verification/Validation tools

Resumes

Vinay Kanakadandila Photo 1

Vinay Kanakadandila Houston, TX

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Work:
Digital Image Processing

Sep 2013 to Nov 2013
Team lead, sub-module coding and Debugger
Individual Research

Jun 2013 to Aug 2013
Layout Designer
Analog to Digital Converter

Mar 2013 to May 2013
Team Lead, Layout Design
Altera DE2 board

Mar 2013 to May 2013
Debugger, Logic design
Automated Home Security System

Sep 2012 to Nov 2012
Hardware Design
VLSI Design

Sep 2012 to Nov 2012
Layout Design and SPICE Simulations, Team Lead
Wireless DC Motor Speed & Direction Control

Jun 2011 to Aug 2011
Hardware Design
Education:
Cullen College of Engineering, University of Houston
Houston, TX
2012 to 2014
Master of Science in Electrical Engineering
Jawaharlal Nehru Technological University
Hyderabad, Andhra Pradesh
2008 to 2012
Bachelor of Technology in Electronics and Communications Engineering
Skills:
Logic Design, Programming Languages (C/C++,Perl), HDLs(VHDL, Verilog), Verification/Validation tools

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