Vivek C Gupta

US Patent:

20220392777, Dec 8, 2022

Filed:

Jun 3, 2021

Appl. No.:

17/337583

Inventors:

- Austin TX, US
Scott M. Hayes - Chandler AZ, US
Michael B. Vincent - Chandler AZ, US
Vivek Gupta - Phoenix AZ, US
Richard Te Gan - Chandler AZ, US

International Classification:

H01L 21/56
H01L 21/67
H01L 21/66
H01L 23/31

Abstract:

A method of manufacturing a packaged semiconductor device is provided. The method includes placing a plurality of semiconductor die on a carrier substrate. The plurality of semiconductor die and an exposed portion of the carrier substrate are encapsulated with an encapsulant. A cooling fixture includes a plurality of nozzles and is placed over the encapsulant. The encapsulant is cooled by way of air exiting the plurality of nozzles. A property of air exiting a first nozzle of the plurality of nozzles is different from that of a second nozzle of the plurality of nozzles.

US Patent:

20220336371, Oct 20, 2022

Filed:

Apr 14, 2021

Appl. No.:

17/230098

Inventors:

- AUSTIN TX, US
Michael B. Vincent - Chandler AZ, US
Zhiwei Gong - Chandler AZ, US
Richard Te Gan - Chandler AZ, US
Vivek Gupta - Phoenix AZ, US

International Classification:

H01L 23/00
H01L 21/56

Abstract:

A method of manufacturing a semiconductor device packaging panel is provided. The method includes forming a panel having an active side and a backside. The panel includes a plurality of semiconductor die encapsulated with an encapsulant. An active surface of the semiconductor die is exposed on the active side of the panel. A warpage control carrier is attached onto the backside of the panel. The warpage control carrier includes an electroactive element configured for substantially flattening the panel while a control voltage is applied to the electroactive element.

US Patent:

20220189890, Jun 16, 2022

Filed:

Dec 11, 2020

Appl. No.:

17/119846

Inventors:

- Austin TX, US
Vivek Gupta - Phoenix AZ, US
Richard Te Gan - Chandler AZ, US
Kabir Mirpuri - Scottsdale AZ, US

International Classification:

H01L 23/66
H01L 23/31
H01L 23/538
H01L 23/00
H01L 21/48
H01L 21/56
H01Q 1/38

Abstract:

A semiconductor device having an integrated antenna is provided. The semiconductor device includes a base die having an integrated circuit formed at an active surface and a cap die bonded to the backside surface of the base die. A metal trace is formed over a top surface of the cap die. A cavity is formed under the metal trace. A conductive via is formed through the base die and the cap die interconnecting the metal trace and a conductive trace of the integrated circuit.

US Patent:

20150001948, Jan 1, 2015

Filed:

Jun 28, 2013

Appl. No.:

13/930236

Inventors:

Fred T. BRAUCHLER - Canton MI, US
John M. PIGOTT - Phoenix AZ, US
Darrel R. FREAR - Phoenix AZ, US
Vivek GUPTA - Phoenix AZ, US
Randall C. GRAY - Tempe AZ, US
Norman L. OWENS - Sun Lakes AZ, US
Carl E. D'ACOSTA - Mesa AZ, US

International Classification:

H01L 25/065
H02J 5/00
H01L 25/00

US Classification:

307104, 257506, 438109

Abstract:

Embodiments of inductive communication devices include first and second galvanically isolated IC die and a dielectric structure. Each IC die has a coil proximate to a first surface of the IC die. The IC die are arranged so that the first surfaces of the IC die face each other, and the first coil and the second coil are aligned across a gap between the first and second IC die. The dielectric structure is positioned within the gap directly between the first and second coils, and a plurality of conductive structures are positioned in or on the dielectric structure and electrically coupled with the second IC die. The conductive structures include portions configured to function as bond pads, and the bond pads may be coupled to package leads using wirebonds. During operation, signals are conveyed between the IC die through inductive coupling between the coils.

US Patent:

20150004902, Jan 1, 2015

Filed:

Jun 28, 2013

Appl. No.:

13/930250

Inventors:

John M. Pigott - Phoenix AZ, US
Fred T. Brauchler - Canton MI, US
Darrel R. Frear - Phoenix AZ, US
Vivek Gupta - Phoenix AZ, US
Randall C. Gray - Tempe AZ, US
Norman L. Owens - Sun Lakes AZ, US
Carl E. D'Acosta - Mesa AZ, US

International Classification:

H04B 5/00
H01L 49/02

US Classification:

455 411, 257531, 438 3

Abstract:

Embodiments of inductive communication devices include first and second galvanically isolated IC die. The first IC die has a first coil proximate to a first surface of the first IC die, and the second IC die has a second coil proximate to a first surface of the second IC die. The first and second IC die are arranged so that the first surfaces of the first and second IC die face each other, and the first coil and the second coil are aligned across a gap between the first and second IC die. One or more dielectric components are positioned within the gap directly between the first and second coils. During operation, a first signal is provided to the first coil, and the first coil converts the signal into a time-varying magnetic field. The magnetic field couples with the second coil, which produces a corresponding second signal.