Vivek V Shah

US Patent:

8437808, May 7, 2013

Filed:

May 3, 2010

Appl. No.:

12/772390

Inventors:

Anand Kashikar - Sunnyvale CA, US
Vivek Shah - Fremont CA, US
Wen Zhao - San Jose CA, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

H04M 1/00
H04B 1/38

US Classification:

455572, 4554352, 4554353, 370312, 370342, 713340

Abstract:

Various embodiments for providing enhanced power savings in mobile computing devices are described. In one or more embodiments, a mobile computing device may monitor the battery power level remaining. The mobile computing device may select a wireless connection type for an application based on Quality of Service (QoS) requirements of the application and the amount of battery power remaining. The mobile computing device may switch the application from a higher QoS wireless connection type to a lower QoS wireless connection type when the battery power falls below a threshold. Other embodiments are described and claimed.

US Patent:

20230089982, Mar 23, 2023

Filed:

Sep 6, 2022

Appl. No.:

17/903581

Inventors:

- Santa Clara CA, US
Andrew Myles - Sunnyvale CA, US
Chunlei Zhang - Santa Clara CA, US
Vivek B. Shah - Santa Clara CA, US
Upendra Ummethala - Cupertino CA, US

International Classification:

H01L 21/687
H01L 21/67
B65G 47/90
G06N 3/08

Abstract:

An electronic device manufacturing system includes a transfer chamber, a tool station situated within the transfer chamber, a process chamber coupled to the transfer chamber, and a transfer chamber robot. The transfer chamber robot is configured to transfer substrates to and from the process chamber. The transfer chamber robot is further configured to be coupled to a sensor tool comprising one or more sensors configured to take measurements inside the process chamber. The sensor tool is retrievable from the tool station by an end effector of the transfer chamber robot.

US Patent:

20230076170, Mar 9, 2023

Filed:

Sep 3, 2021

Appl. No.:

17/466403

Inventors:

- Santa Clara CA, US
Vivek B. Shah - Santa Clara CA, US
Ashutosh Agarwal - San Jose CA, US
Sanjeev Baluja - Campbell CA, US
Shrihari Sampathkumar - Mountain View CA, US
Chunlei Zhang - Santa Clara CA, US

Assignee:

Applied Materials, Inc. - Santa Clara CA

International Classification:

H01L 21/67
H01L 21/66

Abstract:

Metrology slot plates, processing chamber lids and processing chambers having metrology slot plates are described. Each of the metrology slot plates independently comprises one or more of a plate blank, a reflectometer, a capacitance sensor, a gas flow meter, a manometer, a pyrometer, a distance sensor (laser) or an emissometer.

US Patent:

20230048661, Feb 16, 2023

Filed:

Oct 27, 2022

Appl. No.:

17/975452

Inventors:

- Santa Clara CA, US
Ganesh BALASUBRAMANIAN - Fremont CA, US
Vivek Bharat SHAH - Santa Clara CA, US
Jiheng ZHAO - Santa Clara CA, US

International Classification:

H01J 37/32
C23C 16/50
C23C 16/458
C23C 16/52

Abstract:

The present disclosure relates to methods and systems for chucking in substrate processing chambers. In one implementation, a method of chucking one or more substrates in a substrate processing chamber includes applying a chucking voltage to a pedestal. A substrate is disposed on a support surface of the pedestal. The method also includes ramping the chucking voltage from the applied voltage, detecting an impedance shift while ramping the chucking voltage, determining a corresponding chucking voltage at which the impedance shift occurs, and determining a refined chucking voltage based on the impedance shift and the corresponding chucking voltage.

US Patent:

20200381222, Dec 3, 2020

Filed:

Aug 18, 2020

Appl. No.:

16/996004

Inventors:

- Santa Clara CA, US
Prashanth KOTHNUR - San Jose CA, US
Sidharth BHATIA - Santa Cruz CA, US
Anup Kumar SINGH - Santa Clara CA, US
Vivek Bharat SHAH - Sunnyvale CA, US
Ganesh BALASUBRAMANIAN - Fremont CA, US
Changgong WANG - San Jose CA, US

International Classification:

H01J 37/32

Abstract:

Embodiments of the present disclosure generally relate to apparatuses for reducing particle contamination on substrates in a plasma processing chamber. In one or more embodiments, an edge ring is provided and includes a top surface, a bottom surface opposite the top surface and extending radially outward, an outer vertical wall extending between and connected to the top surface and the bottom surface, an inner vertical wall opposite the outer vertical wall, an inner lip extending radially inward from the inner vertical wall, and an inner step disposed between and connected to the inner wall and the bottom surface. During processing, the edge ring shifts the high plasma density zone away from the edge area of the substrate to avoid depositing particles on the substrate when the plasma is de-energized.

US Patent:

20200357668, Nov 12, 2020

Filed:

Jul 28, 2020

Appl. No.:

16/940957

Inventors:

- Santa Clara CA, US
Bhaskar KUMAR - Santa Clara CA, US
Anup Kumar SINGH - Santa Clara CA, US
Vivek Bharat SHAH - Sunnyvale CA, US
Ganesh BALASUBRAMANIAN - Fremont CA, US

International Classification:

H01L 21/67
H01L 21/3065
G06T 7/00
H01J 37/32

Abstract:

Embodiments of the present disclosure relate to a method and an apparatus for monitoring plasma behavior inside a plasma processing chamber. In one example, a method for monitoring plasma behavior includes acquiring at least one image of a plasma, and determining a plasma parameter based on the at least one image.

US Patent:

20200350146, Nov 5, 2020

Filed:

Jul 13, 2020

Appl. No.:

16/927618

Inventors:

- Santa Clara CA, US
Anup Kumar SINGH - Santa Clara CA, US
Vivek Bharat SHAH - Sunnyvale CA, US
Sidharth BHATIA - Santa Cruz CA, US
Ganesh BALASUBRAMANIAN - Fremont CA, US

International Classification:

H01J 37/32

Abstract:

A method and apparatus for operating a plasma processing chamber includes performing a plasma process at a process pressure and a pressure power to generate a plasma. A first ramping-down stage starts in which the process power and the process pressure are ramped down substantially simultaneously to an intermediate power level and an intermediate pressure level, respectively. The intermediate power level and intermediate pressure level are preselected so as to raise a plasma sheath boundary above a threshold height from a surface of a substrate. A purge gas is flowed from a showerhead assembly at a sufficiently high rate to sweep away contaminant particles trapped in the plasma such that one or more contaminant particles move outwardly of an edge of the substrate. A second ramping-down stage starts where the intermediate power level and the intermediate pressure level decline to a zero level and a base pressure, respectively.

US Patent:

20200286716, Sep 10, 2020

Filed:

Feb 27, 2020

Appl. No.:

16/803479

Inventors:

- Santa Clara CA, US
Ganesh BALASUBRAMANIAN - Fremont CA, US
Vivek Bharat SHAH - Sunnyvale CA, US
Jiheng ZHAO - San Jose CA, US

International Classification:

H01J 37/32
C23C 16/50
C23C 16/458

Abstract:

The present disclosure relates to methods and systems for chucking in substrate processing chambers. In one implementation, a method of chucking one or more substrates in a substrate processing chamber includes applying a chucking voltage to a pedestal. A substrate is disposed on a support surface of the pedestal. The method also includes ramping the chucking voltage from the applied voltage, detecting an impedance shift while ramping the chucking voltage, determining a corresponding chucking voltage at which the impedance shift occurs, and determining a refined chucking voltage based on the impedance shift and the corresponding chucking voltage.