Vladimir Levin
Deceased
from Sacramento, CA
- Also known as:
-
- Valadimir Levin
- Valdimir Levin
Vladimir Levin Phones & Addresses
- Sacramento, CA
- 1961 Seabee Pl, San Jose, CA 95133
- 4430 Albany Dr, San Jose, CA 95129 • 4089842538
- 443 Auburn Way, San Jose, CA 95129 • 4089842538
- Bellevue, WA
- Pleasanton, CA
- Los Angeles, CA
- Sunnyvale, CA
- Fremont, CA
Wikipedia References
Vladimir Levin
Work:
Position:
Mathematician • Biologist • Manager • Computer Programmer • System administrator • Hacker
Education:
Area of science:
Biochemistry • Internet
Skills & Activities:
Skill:
Access • Communications
Preference:Conspiracy • Robbery
Activity:Games
Name / Title
Company / Classification
Phones & Addresses
President
COASTAL WATER DEVELOPMENT INC
Single-Family House Construction
Single-Family House Construction
207 N, Los Angeles, CA 90049
207 N Bowling Grn Way, Los Angeles, CA 90049
3109806526
207 N Bowling Grn Way, Los Angeles, CA 90049
3109806526
President
VALLEV, INC
3107 Pearl St, Santa Monica, CA 90405
President
VPL CONSTRUCTION, INC
207 N Bowling Grn Way, Los Angeles, CA 90049
President
VPL Engineering
Government Administration
Government Administration
7101 Hayvenhurst Ave, Van Nuys, CA 91406
7625 Hayvenhurst Ave, Van Nuys, CA 91406
7625 Hayvenhurst Ave, Van Nuys, CA 91406
Managing
Consuelo Drive, LLC
Real Estate Management · Nonclassifiable Establishments
Real Estate Management · Nonclassifiable Establishments
7625 Hayvenhurst Ave, Van Nuys, CA 91406
Resumes
Vladimir Levin
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Vladimir Levin
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Vladimir Levin
view sourceUs Patents
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Sound Transaction-Based Reduction Without Cycle Detection
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US Patent:7650595, Jan 19, 2010
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Filed:Apr 29, 2005
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Appl. No.:11/119530
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Inventors:Shaz Qadeer - Seattle WA, US
Sriram K. Rajamani - Bellevue WA, US
Vladimir A. Levin - Redmond WA, US
Robert Palmer - Salt Lake City UT, US -
Assignee:Microsoft Corporation - Redmond WA
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International Classification:G06F 9/44
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US Classification:717127, 717131
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Abstract:Described techniques and tools help model checking scale to large programs while reducing missed errors. In particular, described techniques and tools help reduce the state space of concurrent programs without depending on cycle detection and without scheduling execution of postponed threads at all cycles. For example, described techniques and tools use a type of partial-order reduction called transaction-based reduction to reduce program state space. Analysis is performed at commit points to determine whether to schedule delayed threads.
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Binary Verification Service
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US Patent:8074205, Dec 6, 2011
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Filed:Apr 18, 2007
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Appl. No.:11/736935
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Inventors:Shankara M. C. Shastry - Bangalore, IN
Perraju Bendapudi - Hyderabad, IN
Narayanan Ganapathy - Redmond WA, US
Vladimir A. Levin - Redmond WA, US -
Assignee:Microsoft Corporation - Redmond WA
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International Classification:G06F 9/44
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US Classification:717126, 717124
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Abstract:A binary is received at a binary verification service from a binary verification client agent. The binary verification service performs binary verification of the binary, wherein binary verification includes determining whether the binary is complicit with a set of usage rules. The binary verification service sends a binary verification result to the binary verification client agent.
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Program Analysis Through Predicate Abstraction And Refinement
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US Patent:8402444, Mar 19, 2013
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Filed:Oct 9, 2009
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Appl. No.:12/576253
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Inventors:Thomas J. Ball - Mercer Island WA, US
Eleonora O. Bounimova - Redmond WA, US
Vladimir A. Levin - Redmond WA, US
Rahul Kumar - Redmond WA, US -
Assignee:Microsoft Corporation - Redmond WA
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International Classification:G06F 9/44
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US Classification:717128, 717124, 717125, 717126, 717127, 717129, 717130, 717131, 717132, 717133, 717134, 717135
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Abstract:An analysis engine is described for performing static analysis using CEGAR loop functionality, using a combination of forward and backward validation-phase trace analyses. The analysis engine includes a number of features. For example: (1) the analysis engine can operate on blocks of program statements of different adjustable sizes; (2) the analysis engine can identify a subtrace of the trace and perform analysis on that subtrace (rather than the full trace); (3) the analysis engine can form a pyramid of state conditions and extract predicates based on the pyramid and/or from auxiliary source(s); (4) the analysis engine can generate predicates using an increasingly-aggressive series of available discovery techniques; (5) the analysis engine can selectively concretize procedure calls associated with the trace on an as-needed basis and perform other refinements; and (6) the analysis engine can add additional verification targets in the course of its analysis, etc.
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Processing Predicates Including Pointer Information
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US Patent:8595707, Nov 26, 2013
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Filed:Dec 30, 2009
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Appl. No.:12/649335
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Inventors:Eleonora O. Bounimova - Redmond WA, US
Vladimir A. Levin - Redmond WA, US
Leonardo M. de Moura - Sammamish WA, US
Thomas J. Ball - Mercer Island WA, US -
Assignee:Microsoft Corporation - Redmond WA
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International Classification:G06F 17/24
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US Classification:717131, 703 2, 703 22, 714 39, 715234, 717104, 717133
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Abstract:A system is described for processing predicates in the course of analyzing a program, based on a general-purpose theory of pointers. The system converts location expressions in the predicates into logical formulae that are interpretable by a theorem prover module, producing converted predicates. This conversion associates the location expressions with location objects. More specifically, the conversion represents variables as explicitly-specified location objects, and location terms (such as a field-type access terms and dereference-type terms) as constructor-specified location objects. The theory of pointers is also expressed by a set of axioms which constrain the operation of the theorem prover module.
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Precondition Rules For Static Verification Of Code
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US Patent:20090319997, Dec 24, 2009
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Filed:Jun 20, 2008
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Appl. No.:12/142775
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Inventors:Jakob Frederik Lichtenberg - Seattle WA, US
Conal McGarvey - Seattle WA, US
Eleonora O. Bounimova - Redmond WA, US
Vladimir A. Levin - Redmond WA, US -
Assignee:Microsoft Corporation - Redmond WA
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International Classification:G06F 9/44
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US Classification:717126
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Abstract:A verification engine for verifying compliance of a module of computer-executable instructions to various specifications or guidelines can utilize precondition rules to obtain information about the module so as to select appropriate rules with which the module will be verified. The precondition rules can inform an evaluation tool, which can obtain the specified information about the module. A preprocessor can then evaluate conditional statements and select one or more rules or environment modules based on the results of the evaluation of the precondition rules. Multiple levels of dependent precondition rules can be evaluated with a drill-down approach, where each dependency chain is evaluated until a terminal level, or with a layered approach, where all terminal level precondition rules are evaluated followed by precondition rules of increasingly higher levels.
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Per Group Verification
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US Patent:20100186003, Jul 22, 2010
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Filed:Jan 22, 2009
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Appl. No.:12/357583
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Inventors:Adam Shapiro - Redmond WA, US
Conal McGarvey - Seattle WA, US
Vladimir A. Levin - Redmond WA, US
Jakob F. Lichtenberg - Seattle WA, US -
Assignee:Microsoft Corporation - Redmond WA
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International Classification:G06F 9/44
G06N 5/02 -
US Classification:717126, 706 47
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Abstract:Various embodiments provide per group verification techniques in which code may be verified against one or more rules on a group by group basis. In one or more embodiments relationships between portions of a module to be verified can be defined. By being aware of relationships between various code portions, various embodiments can divide a module into related groups and perform verification on the basis of the groups. Multiple groups can be derived based at least in part upon the relationships. Each group can then be verified separately for compliance with one or more rules. Verification results can be output for each of the groups.
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Segmentation For Static Analysis
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US Patent:20100275186, Oct 28, 2010
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Filed:Apr 28, 2009
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Appl. No.:12/431187
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Inventors:Conal McGarvey - Seattle WA, US
Vladimir A. Levin - Redmond WA, US
Jakob F. Lichtenberg - Seattle WA, US -
Assignee:MICROSOFT CORPORATION - Redmond WA
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International Classification:G06F 9/44
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US Classification:717132, 717131
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Abstract:Various embodiments provide techniques to segment program code that may be the subject of static analysis. In one or more embodiments, an algorithm is applied to an abstract representation of the program code to derive segments for the program code. In at least some embodiments, multiple segments can be derived based at least in part upon of one or more “boxed” portions of the program code that are designated to remain intact within the segments. Each segment can then be subjected individually to static analysis to verify compliance with one or more prescribed behaviors. Verification results can be output for each individual segment and the individual results can be combined to obtain results for the program code overall.
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Extensible Device Driver Verification
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US Patent:20200264967, Aug 20, 2020
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Filed:Feb 14, 2019
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Appl. No.:16/275844
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Inventors:- Redmond WA, US
Jakob Frederik LICHTENBERG - Redmond WA, US
Vladimir A. LEVIN - Redmond WA, US
Andrew Meyer KLUEMKE - Seattle WA, US
Sebastian LERNER - Seattle WA, US -
International Classification:G06F 11/36
G06F 11/34
G06F 11/30 -
Abstract:Interaction between operating system components and device drivers via device driver function call addresses is monitored. Each device driver is configured to interface with at least one hardware component of a computing system. One or more verification functions of an extended device driver verification component are registered for at least one of the device driver function call addresses, each defining a predetermined verification condition. A device driver function call to one of the device driver function call addresses is intercepted and evaluated against the predetermined verification condition of the verification function registered for the device driver function call address of the intercepted device driver function. A result of executing the intercepted device driver function, responsive to satisfaction of the predetermined verification condition or terminated, responsive failure to satisfy the predetermined verification condition of the verification function registered for the device driver function call address of the intercepted device driver function.
Wikipedia
Vladimir Levin
view sourceVladimir Levin is a Russian-born Jewish individual famed for his involvement in the attempt to fraudulently transfer US$10.7 million via Citibank's computers.
Amazon
Synagogues in Lithuania. A Catalogue N - Z
view sourceSynagogues constitute a substantial part of Lithuania s sacred built heritage. Until World War II there were about one thousand Jewish prayer houses in cities and towns of Lithuania, while today only about one hundred buildings are extant, many of them abandoned and in varied degree of preservation....
Author
Aliza Coen-Mushlin, Sergey Kravtsov, Vladimir Levin, Giedre Mickunaite, Jurgita Siauciunaite -Verbickiene
Binding
Paperback
Pages
472
Publisher
Vilniaus dailes akademijos leidykla - Vilnius Academy of Arts Press
ISBN #
6094470044
EAN Code
9786094470042
ISBN #
2
Synagogues in Lithuania. A Catalogue A - M
view sourceSynagogues constitute a substantial part of Lithuania s sacred built heritage. Until World War II there were about one thousand Jewish prayer houses in cities and towns of Lithuania, while today only about one hundred buildings are extant, many of them abandoned and in varied degree of preservation....
Author
Aliza Coen-Mushlin, Sergey Kravtsov, Vladimir Levin, Giedre Mickunaite, Jurgita Siauciunaite-Verbickiene
Binding
Paperback
Pages
336
Publisher
Vilniaus dailes akademijos leidykla - Vilnius Academy of Arts Press
ISBN #
995585460X
EAN Code
9789955854609
ISBN #
1
Polymer Processing (Advances in Polymer Science) (Volume 93)
view sourceBinding
Paperback
Pages
190
Publisher
Springer
ISBN #
3662150417
EAN Code
9783662150412
ISBN #
4
On the possibility of nuclear synthesis during orthopositronium formation by [[beta].sup.+]-decay positrons in deuterium.: An article from: Progress in Physics
view sourceThis digital document is an article from Progress in Physics, published by Thomson Gale on July 1, 2007. The length of the article is 2353 words. The page length shown above is based on a typical 300-word page. The article is delivered in HTML format and is available in your Amazon.com Digital Locke...
Author
Boris A. Kotov, Boris M. Levin, Vladimir I. Sokolov
Binding
Digital
Pages
8
Publisher
Thomson Gale
ISBN #
9
Plaxo
Vladimir Levin
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Youtube
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VLADIMIR LEVIN
view sourceTags:
Male, Age: 59, Business and Auxiliary Systems Manager
Locality:
Brooklyn, NY
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Vladimir Levin
Vladimir Levin
Vladimir Levin
Vladimir Levin
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Vladimir Levin
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Classmates
Vladimir Levin - Ming Lee...
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Vladimir Levin
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Vladimir Levin
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Vladimir Levin
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Vladimir Levin
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Vladimir Levin
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Vladimir Levin
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Vladimir Levin
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Vladimir Levin Batubara
view sourceGet Report for Vladimir Levin from Sacramento, CADeceased