Wadie F Mikhail

US Patent:

40807207, Mar 28, 1978

Filed:

Dec 27, 1976

Appl. No.:

5/754704

Inventors:

John Balyoz - Hopewell Junction NY
Algirdas Joseph Gruodis - Wappingers Falls NY
Teh-Sen Jen - Fishkill NY
Wadie Faltas Mikhail - Poughkeepsie NY

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

H01L 2972

US Classification:

29577C

Abstract:

An integrated logic circuit having a novel layout in a semiconductor substrate. The area required for the circuits within the substrate is substantially less than that of prior layouts. Each circuit includes a first device including an elongated impurity region and a set of other impurity regions either in, or in contiguous relationship with, the elongated region; to form a set of diode junctions. The elongated region is capable of containing a predetermined maximum number of the other impurity regions. A second device is located adjacent the narrow side of said first device. A first set of first level conductors extends over the elongated region orthogonally with respect to the elongated direction and are interconnected to selected ones of the other impurity regions. Another conductor is a second level atop the substrate is connected to an impurity region of the second device and extends substantially parallel to the elongated direction. For the most part, this conductor connects the second device with one of the conductors in the first set.

US Patent:

40329623, Jun 28, 1977

Filed:

Dec 29, 1975

Appl. No.:

5/644775

Inventors:

John Balyoz - Hopewell Junction NY
Algirdas Joseph Gruodis - Wappingers Falls NY
Teh-Sen Jen - Fishkill NY
Wadie Faltas Mikhail - Poughkeepsie NY

Assignee:

IBM Corporation - Armonk NY

International Classification:

H01L 2348
H01L 2944
H01L 2952
H01L 2960

US Classification:

357 68

Abstract:

An integrated logic circuit having a novel layout in a semiconductor substrate. The area required for the circuits within the substrate is substantially less than that of prior layouts. Each circuit includes a first device including an elongated impurity region and a set of other impurity regions either in, or in contiguous relationship with, the elongated region to form a set of diode junctions. The elongated region is capable of containing a predetermined maximum number of the other impurity regions. A second device is located adjacent the narrow side of said first device. A first set of first level conductors extends over the elongated region orthogonally with respect to the elongated direction and are interconnected to selected ones of the other impurity regions. Another conductor in a second level atop the substrate is connected to an impurity region of the second device and extends substantially parallel to the elongated direction. For the most part, this conductor connects the second device with one of the conductors in the first set.