Walter J Rowe

US Patent:

20050136563, Jun 23, 2005

Filed:

Dec 17, 2003

Appl. No.:

10/738144

Inventors:

Walter Rowe - Palm Bay FL, US
Isaiah McDonald - Palm Bay FL, US
Malcolm Cambra - Palm Bay FL, US

International Classification:

H01L021/66
G01R031/26

US Classification:

438015000

Abstract:

Backside failure analysis of integrated circuits. In one embodiment, a method of preparing a device under test (DUT) for an image based diagnostic testing is disclosed. The method comprises removing a portion of the backside package of the DUT to allow for the implementation of an image based diagnostic test through the backside of the DUT. The functionality of DUT is destroyed by the removal of the portion of the backside package of the DUT. Further, restoring the functionality of the DUT with an interface carrier before an image based diagnostic test is conducted.