Wayne M Greene

US Patent:

6529240, Mar 4, 2003

Filed:

Nov 18, 1999

Appl. No.:

09/442650

Inventors:

Charles M. C. Tan - Santa Clara CA
Wayne M. Greene - Los Gatos CA
Francis Joseph - Sunnyvale CA

Assignee:

Agilent Technologies, Inc. - Palo Alto CA

International Classification:

H04N 314

US Classification:

348302

Abstract:

An imaging device includes a Gray Code generator and an array of pixels. Each pixel includes a complimentary metal oxide semiconductor (âCMOSâ) sensor, a comparator and random access memory (e. g. , ferroelectric random access memory). The Gray Code generator is started at the beginning of capture mode and begins providing a sequence of code words. Within each pixel, an output of a CMOS sensor is compared to a threshold, and a code word in the sequence is stored in random access memory when the sensor output crosses the threshold. Thus, the random access memory of each pixel stores a code word that represents the intensity of light detected by its associated CMOS sensor.

US Patent:

6765280, Jul 20, 2004

Filed:

Dec 21, 1998

Appl. No.:

09/217740

Inventors:

Min Cao - Mountain View CA
Paul J. Vande Voorde - San Mateo CA
Wayne M. Greene - Los Gatos CA
Malahat Tavassoli - Los Altos CA

Assignee:

Agilent Technologies, Inc. - Palo Alto CA

International Classification:

H01L 2900

US Classification:

257510, 257513

Abstract:

A semiconductor isolation structure. The semiconductor isolation structure includes a substrate. A first device and a second device are formed within the substrate. An isolation region is formed within the substrate between the first device and the second device. The isolation region includes a deep region which extends into the substrate. The deep region includes a deep region cross-sectional area. A shallow region extends to the surface of the substrate. The shallow region includes a shallow region cross-sectional area. The deep region cross-sectional area is greater than the shallow region cross-sectional area. For an alternate embodiment, the deep region includes an oxide and the shallow region includes a protective wall. The protective wall can be formed from an oxide and a nitride.

US Patent:

7779127, Aug 17, 2010

Filed:

Mar 9, 2007

Appl. No.:

11/684567

Inventors:

Ludmila Cherkasova - Fort Collins CO, US
Qi Zhang - Fort Collins CO, US
Guy Mathews - Fort Collins CO, US
Wayne Greene - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 15/16
G06F 15/173
G06F 9/46

US Classification:

709226, 709205, 718104

Abstract:

A method comprises receiving a representative workload of a computing system, where the representative workload comprises a plurality of composite transactions. In certain embodiments, the representative workload is a historical workload of a computing system. In general, a composite transaction refers to a transaction that comprises a plurality of embedded transactions. The method further comprises determining a subset of the plurality of composite transactions for which a corresponding resource cost is to be determined; and determining, based at least in part on a statistical regression-based analysis, a resource cost for the composite transaction(s) in the determined subset, where the resource cost reflects an amount of utilization of at least one resource of the computing system in serving the composite transaction(s).

US Patent:

8032585, Oct 4, 2011

Filed:

Mar 9, 2007

Appl. No.:

11/684563

Inventors:

Ludmila Cherkasova - Fort Collins CO, US
Qi Zhang - Fort Collins CO, US
Guy Mathews - Fort Collins CO, US
Wayne Greene - Fort Collins CO, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06F 15/16

US Classification:

709203

Abstract:

A method comprises receiving a representative workload of a computing system, where the representative workload comprises at least one composite transaction. In certain embodiments, the representative workload is a historical workload of a computing system. In general, a composite transaction refers to a transaction that comprises a plurality of transactions. For instance, a given transaction for serving a client's request for information (e. g. , a web page) may include embedded therein a plurality of requests/responses for objects (e. g. , images, etc. ) that form the information (e. g. , that form the requested web page). The method further comprises determining, based at least in part on a statistical regression-based analysis, a resource cost for the at least one composite transaction, where the resource cost reflects an amount of utilization of at least one resource of the computing system, such as CPU utilization, in serving the at least one composite transaction.

US Patent:

20080221941, Sep 11, 2008

Filed:

Mar 9, 2007

Appl. No.:

11/684569

Inventors:

Ludmila Cherkasova - Fort Collins CO, US
Qi Zhang - Fort Collins CO, US
Guy Mathews - Fort Collins CO, US
Wayne Greene - Fort Collins CO, US

International Classification:

G06F 9/46

US Classification:

705 7, 718105

Abstract:

A method comprises receiving, by a workload profiler, a representative workload of a computing system under analysis. The workload profiler determines a workload profile of the computing system that reflects a transaction mix that varies over times. A capacity analyzer receives the workload profile, and determines a maximum capacity of the computing system under analysis for serving the workload profile while satisfying a defined quality of service (QoS) target.

US Patent:

58611908, Jan 19, 1999

Filed:

Mar 25, 1996

Appl. No.:

8/621410

Inventors:

Wayne M. Greene - Los Gatos CA
Michael B. Cox - Los Gatos CA
Frank Perlaki - Palo Alto CA
Elizabeth C. Carr - Sunnyvale CA

Assignee:

Hewlett-Packard Co. - Palo Alto CA

International Classification:

C23C 1602
C23C 1646
C23C 1622

US Classification:

4272481

Abstract:

A process of growing a dielectric layer includes a step of heating a gas mixture of at least one gas having a first chemical element of oxygen and a second chemical element other than oxygen to a first predetermined temperature to produce reactive precursors of the gas mixture. The reactive precursors are then introduced into a reaction chamber that houses at least one wafer to grow the dielectric layer on the wafer within the reaction chamber at a second predetermined temperature below the first predetermined temperature. A semiconductor manufacturing apparatus of growing the dielectric layer is also described.

US Patent:

62291912, May 8, 2001

Filed:

Nov 19, 1999

Appl. No.:

9/443960

Inventors:

Min Cao - Mountain View CA
Wayne M. Greene - Los Gatos CA
Dietrich W. Vook - Menlo Park CA

Assignee:

Agilent Technologies, Inc. - Palo Alto CA

International Classification:

H01L 310376
H01L 310226
H01L 31075
H01L 310232

US Classification:

257444

Abstract:

An array of active pixel sensors. The array of active pixel sensors includes a substrate that includes electronic circuitry. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes a plurality of conductive vias. A plurality of conductive guard rings are formed adjacent to the interconnect structure. Each conductive guard ring is electrically connected to the substrate through at least one of the conductive vias. A plurality of photo diode sensors are formed adjacent to the interconnect structure. Each photo diode sensor is surrounded by at least one of the conductive guard rings. Each photo diode sensor includes a pixel electrode. The pixel electrode is electrically connected to the substrate through a corresponding conductive via. An I-layer is formed adjacent to the pixel electrode. The array of active pixel sensors further includes a transparent conductive layer formed adjacent to the photo diode sensors.

US Patent:

61147397, Sep 5, 2000

Filed:

Oct 19, 1998

Appl. No.:

9/174717

Inventors:

Jeremy A. Theil - Mountain View CA
Min Cao - Mountain View CA
Dietrich W. Vook - Menlo Park CA
Frederick A. Perner - Palo Alto CA
Xin Sun - San Jose CA
Shawming Ma - Sunnyvale CA
Gary W. Ray - Mountain View CA
Wayne M. Greene - Los Gatos CA
Kit M. Cham - Cupertino CA
Steven A. Lupi - Gilroy CA

Assignee:

Agilent Technologies - Palo Alto CA

International Classification:

H01L 2714
H01L 3100

US Classification:

257458

Abstract:

An active pixel sensor. The active pixel sensor includes a substrate, an interconnect structure adjacent to the substrate, and at least one photo sensor adjacent to the interconnect structure. At least one photo sensor is formed adjacent to the interconnect structure. Each photo sensor includes a pixel electrode which includes a patterned doped semiconductor layer. An I-layer is formed adjacent to the patterned doped semiconductor layer. A transparent electrode is formed adjacent to the I-layer. A method of forming the active pixel sensor includes forming an interconnect structure over a substrate. Next, a doped semiconductor layer is deposited over the interconnect structure. The doped semiconductor layer is etched forming pixel electrode. An I-layer is deposited over the pixel electrodes. Finally, a transparent conductive layer is deposited over the I-layer.