Weimin M Li

US Patent:

20180130654, May 10, 2018

Filed:

Jan 4, 2018

Appl. No.:

15/862205

Inventors:

- Billerica MA, US
Chongying Xu - Suzhou, CN
Bryan C. Hendrix - Danbury CT, US
Jeffrey F. Roeder - Brookfield CT, US
Steven M. Bilodeau - Oxford CT, US
Weimin Li - New Milford CT, US

International Classification:

H01L 21/02
H01L 29/06

Abstract:

A full fill trench structure is described, including a microelectronic device substrate having a high aspect ratio trench therein and filled with silicon dioxide of a substantially void-free character and substantially uniform density throughout its bulk mass. A method of manufacturing a semiconductor product also is described, involving use of specific silicon precursor compositions for forming substantially void-free and substantially uniform density silicon dioxide material in the trench. The precursor fill composition may include silicon and germanium, to produce a microelectronic device structure including a GeO/SiOtrench fill material. A suppressor component may be employed in the precursor fill composition, to eliminate or minimize seam formation in the cured trench fill material.

US Patent:

20170103888, Apr 13, 2017

Filed:

Oct 13, 2016

Appl. No.:

15/292760

Inventors:

- Billerica MA, US
Bryan C. Hendrix - Danbury CT, US
Yuqi Li - Danbury CT, US
Susan V. DiMeo - New City NY, US
Weimin Li - New Milford CT, US
William Hunks - Danbury CT, US

International Classification:

H01L 21/02
C23C 16/455
C23C 16/40

Abstract:

A precursor composition is described, useful for low temperature (

US Patent:

20160225615, Aug 4, 2016

Filed:

Apr 8, 2016

Appl. No.:

15/093865

Inventors:

- Billlerica MA, US
Chongying Xu - Suzhou, CN
Bryan C. Hendrix - Danbury CT, US
Jeffrey F. Roeder - Brookfield CT, US
Steven M. Bilodeau - Oxford CT, US
Weimin Li - New Milford CT, US

Assignee:

Entegris, Inc. - Billlerica MA

International Classification:

H01L 21/02
H01L 29/06

Abstract:

A full fill trench structure is described, including a microelectronic device substrate having a high aspect ratio trench therein and filled with silicon dioxide of a substantially void-free character and substantially uniform density throughout its bulk mass. A method of manufacturing a semiconductor product also is described, involving use of specific silicon precursor compositions for forming substantially void-free and substantially uniform density silicon dioxide material in the trench. The precursor fill composition may include silicon and germanium, to produce a microelectronic device structure including a GeO/SiOtrench fill material. A suppressor component may be employed in the precursor fill composition, to eliminate or minimize seam formation in the cured trench fill material.

US Patent:

20150147824, May 28, 2015

Filed:

May 22, 2013

Appl. No.:

14/400793

Inventors:

- Danbury CT, US
Susan V. DiMeo - New City NY, US
Bryan C. Hendrix - Danbury CT, US
Weimin Li - New Milford CT, US

Assignee:

ADVANCED TECHNOLOGY MATERIALS, INC. - Danbury CT

International Classification:

H01L 21/28
H01L 49/02
C23C 16/40
C23C 16/44
C23C 16/455
H01L 29/51
C09D 5/24

US Classification:

438 3, 556407, 438393, 556412, 556410, 25251931, 42725528

Abstract:

A silicon precursor composition is described, including a silylene compound selected from among: silylene compounds of the formula: wherein each of R and Ris independently selected from organo substituents; amidinate silylenes; and bis(amidinate) silylenes. The silylene compounds are usefully employed to form high purity, conformal silicon-containing films of Si0, SiN, SiC and doped silicates in the manufacture of microelectronic device products, by vapor deposition processes such as CVD, pulsed CVD, ALD and pulsed plasma processes. In one implementation, such silicon precursors can be utilized in the presence of oxidant, to seal porosity in a substrate comprising porous silicon oxide by depositing silicon oxide in the porosity at low temperature, e.g., temperature in a range of from 50 C. to 200 C.