Wen L Lin

US Patent:

6851011, Feb 1, 2005

Filed:

Aug 9, 2001

Appl. No.:

09/927010

Inventors:

Wen Lin - Longmont CO, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

G06F 1316
G06F 1318

US Classification:

711 4, 711111, 711154, 711158, 710 5, 710 39, 710 40, 710244, 369 5327

Abstract:

A hardware command queue for mass storage systems having a memory device. A plurality of entries are defined in the memory device, at least some of which are active entries. At least some of the active entries correspond to pending access commands and at least one entry is a head entry corresponding to an in-flight access command. A physical target location is stored in each active entry and a computed servo distance value is stored in each active entry. A link list including pointers defining an execution sequence is stored with the command queue.

US Patent:

7167959, Jan 23, 2007

Filed:

Nov 16, 2004

Appl. No.:

10/989444

Inventors:

Wen Lin - Longmont CO, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX

International Classification:

G06F 13/16
G06F 13/18

US Classification:

711158, 711151, 711154, 710 5, 710 39, 710 40, 710 58

Abstract:

A hardware command queue for mass storage systems having a memory device. A plurality of entries are defined in the memory device, at least some of which are active entries. At least some of the active entries correspond to pending access commands and at least one entry is a head entry corresponding to an in-flight access command.

US Patent:

7450332, Nov 11, 2008

Filed:

Jun 24, 2005

Appl. No.:

11/166770

Inventors:

Fabio Pasolini - San Martino Siccomario, IT
Michele Tronconi - San Martino Siccomario, IT
Wen Lin - Longmont CO, US
William R. Raasch - Longmont CO, US

Assignee:

STMicroelectronics, Inc. - Carrollton TX
STMicroelectronics S.R.L. - Agrate Brianza

International Classification:

G11B 21/02
G11B 19/02

US Classification:

360 75, 360 69, 360 7804

Abstract:

In an integrated free-fall detection device for a portable apparatus an acceleration sensor generates acceleration signals correlated to the components of the acceleration of the portable apparatus along three detection axes. A dedicated purely hardware circuit connected to the acceleration sensor generates a free-fall detection signal in a continuous way and in real-time. The free-fall detection signal has a first logic value in the event that the acceleration signals are simultaneously lower than a respective acceleration threshold, and is sent to a processor unit of the portable apparatus as an interrupt signal to activate appropriate actions of protection for the portable apparatus. Preferably, the acceleration sensor and the dedicated purely hardware circuit are integrated in a single chip and the acceleration sensor is made as a MEMS.

US Patent:

20030046499, Mar 6, 2003

Filed:

Aug 30, 2001

Appl. No.:

09/943242

Inventors:

Wen Lin - Longmont CO, US

International Classification:

G06F013/00

US Classification:

711/154000, 711/112000

Abstract:

A computing system having a processor with a data/control bus interface. A data/control bus implements one or more device communication channels. A data memory is coupled to the processor and a mass storage device having an interface for communicating mass storage transactions is provided. A controller having a memory interface is coupled to the data memory and a mass storage interface coupled to the mass storage device's interface and operable to conduct mass storage transactions between the data memory and the mass storage device.

US Patent:

20110179864, Jul 28, 2011

Filed:

Jan 27, 2010

Appl. No.:

12/694835

Inventors:

William R. RAASCH - Longmont CO, US
Wen Lin - Longmont CO, US
Paolo Bendiscioli - Pavia, IT
Alberto Ressia - Viguzzolo, IT

Assignee:

STMicroelectronics, Inc. - Carrollton TX
STMicroelectronics Srl - Agrate Brianza

International Classification:

G01P 1/00

US Classification:

73493

Abstract:

A clamshell device having a dual accelerometer detector includes a first keyboard portion including a first accelerometer, a second display portion including a second accelerometer, a hinge for coupling the first portion to the second portion, and circuitry coupled to the first and second accelerometers for providing an output signal in response to the position of the first and second portions of the clamshell device. The output signal is provided to indicate a shutdown or standby mode, tablet operation mode, a partially shut or power savings mode, a normal operating mode, or an unsafe operating mode.

US Patent:

61192546, Sep 12, 2000

Filed:

Dec 23, 1997

Appl. No.:

8/997130

Inventors:

Nicolas C. Assouad - Niwot CO
David L. Dyer - Boulder CO
Wen Lin - Niwot CO

Assignee:

STMicroelectronics, N.V.

International Classification:

G01R 3128

US Classification:

714724

Abstract:

A method of testing a processor controlled chip having embedded circuitry devoid of a direct connection external to said chip. Tracing circuitry embedded on the chip is programmed to detect the presence of specified information on a bus system embedded on the chip and devoid of a direct connection external to the chip. An address comparator detects the presence of the specified information on the bus system and opens gating circuitry in response to the detection. The specified information is extended through the gating circuitry and written in a buffer memory. The specified information can be read out of the buffer memory and extended to a user terminal external to the chip.

US Patent:

60645350, May 16, 2000

Filed:

Aug 14, 1997

Appl. No.:

8/911097

Inventors:

Aaron W. Wilson - Berthoud CO
Russell B. Josephson - Berthoud CO
Wen Lin - Niwot CO
Wayne A. Thorsted - Longmont CO

Assignee:

STMicroelectronics, N.V.

International Classification:

G11B 1504

US Classification:

360 60

Abstract:

A system for halting operation of a hard disk controller when a write operation occurs during a servo positioning error condition including a memory cell for retaining an indication of whether a write operation occurred during the previous servo sector. A memory cell, such as a flip flop, is set on any occurrence of a write operation. With the reading of a next servo field, the output of the first flip flop is latched to a second flip flop. During a present servo sector, a servo positioning error signal is logically AND'ed with a write gate active signal where the write gate active signal is enabled if write gate is active in the present servo sector or write gate was active in the previous servo sector (as indicated by the output from the second flip flop.

US Patent:

20180227135, Aug 9, 2018

Filed:

Apr 4, 2018

Appl. No.:

15/945671

Inventors:

- Sunnyvale CA, US
Zhaohui Zhang - Westford MA, US
Wen Lin - Andover MA, US
Tapraj Singh - San Ramon CA, US

International Classification:

H04L 12/18
H04L 12/761
H04L 12/46

Abstract:

Techniques are described for utilizing Protocol Independent Multicast Sparse Mode (PIM-SM) to transport BUM (broadcast, unknown unicast, and multicast) traffic in a Virtual Extensible LAN (VXLAN) underlay of a data center, where the BUM traffic is received on active-active, multi-homed Ethernet virtual private network (EVPN) interconnects between multiple physical data centers. For example, the techniques may readily be applied to support usage of PIM-SM where provider edge (PE) routers of the EVPN operate as gateways between the EVPN and the VXLAN spanning the data center interconnect.