William L Headley

US Patent:

6881610, Apr 19, 2005

Filed:

Jan 2, 2003

Appl. No.:

10/335796

Inventors:

William R. Headley - Santa Clara CA, US
Mario J. Paniccia - Santa Clara CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L021/44
H01L021/46

US Classification:

438113, 438460

Abstract:

An apparatus and method for preparing a plurality of dice on a semiconductor wafer. In one embodiment, a method according to embodiments of the present invention includes arranging a plurality of dice in a semiconductor wafer such that there is a separation region between each neighboring die of the semiconductor wafer. One or more trenches are etched in the separation region of the semiconductor wafer to form one or more lateral surfaces of one or more of the plurality of dice. The semiconductor wafer is then fractured into separate pieces at the one or more trenches to separate the plurality of dice from each other.

US Patent:

6911672, Jun 28, 2005

Filed:

Jun 2, 2004

Appl. No.:

10/860576

Inventors:

William R. Headley - Santa Clara CA, US
Mario J. Paniccia - Santa Clara CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L027/15

US Classification:

257 80, 257 99

Abstract:

An apparatus and method for preparing a plurality of dice on a semiconductor wafer. In one embodiment, a method according to embodiments of the present invention includes arranging a plurality of dice in a semiconductor wafer such that there is a separation region between each neighboring die of the semiconductor wafer. One or more trenches are etched in the separation region of the semiconductor wafer to form one or more lateral surfaces of one or more of the plurality of dice. The semiconductor wafer is then fractured into separate pieces at the one or more trenches to separate the plurality of dice from each other.

US Patent:

7049672, May 23, 2006

Filed:

Jun 2, 2004

Appl. No.:

10/860698

Inventors:

William R. Headley - Santa Clara CA, US
Mario J. Paniccia - Santa Clara CA, US

Assignee:

Intel Corporation - Santa Clara CA

International Classification:

H01L 31/0232
H01L 33/00

US Classification:

257437, 257103

Abstract:

An apparatus and method for preparing a plurality of dice on a semiconductor wafer. In one embodiment, a method according to embodiments of the present invention includes arranging a plurality of dice in a semiconductor wafer such that there is a separation region between each neighboring die of the semiconductor wafer. One or more trenches are etched in the separation region of the semiconductor wafer to form one or more lateral surfaces of one or more of the plurality of dice. The semiconductor wafer is then fractured into separate pieces at the one or more trenches to separate the plurality of dice from each other.

US Patent:

20040081386, Apr 29, 2004

Filed:

Oct 25, 2002

Appl. No.:

10/280397

Inventors:

Michael Morse - San Jose CA, US
William Headley - Santa Clara CA, US
Mario Paniccia - Santa Clara CA, US

International Classification:

G02B006/26
G02F001/035

US Classification:

385/015000, 385/050000, 385/003000

Abstract:

An apparatus and method for modulating an optical beam by modulating charge in ring resonator to modulate a resonance condition of the ring resonator. In one embodiment, an apparatus according to embodiments of the present invention includes a ring resonator having a resonance condition disposed in semiconductor material. An input optical waveguide disposed in the semiconductor material is optically coupled to the ring resonator. An output optical waveguide is disposed in the semiconductor material and is optically coupled to the ring resonator. A charge modulated region is disposed in the ring resonator and the charge modulated region is adapted to be modulated to adjust a resonance condition of the ring resonator.