William Allen Hooper

US Patent:

7508638, Mar 24, 2009

Filed:

Jul 10, 2006

Appl. No.:

11/456394

Inventors:

William P. Hooper - Duluth GA, US

Assignee:

Siemens Energy & Automation, Inc. - Alpharetta GA

International Classification:

H02H 3/00

US Classification:

361 42

Abstract:

Certain exemplary embodiments comprise an electrical power distribution panel, which can comprise a Source Line Evaluation Detector. The Source Line Evaluation Detector can be configured to open a contactor responsive to at least one condition from a plurality of monitored electrical source line conditions. The Source Line Evaluation Detector can be configured to monitor the one or more monitored electrical source line conditions.

US Patent:

8081001, Dec 20, 2011

Filed:

Mar 20, 2009

Appl. No.:

12/408229

Inventors:

William P. Hooper - Duluth GA, US
Hugh T. Kinsel - Sugar Hill GA, US

Assignee:

Siemens Industry, Inc. - Alpharetta GA

International Classification:

G01R 31/14
G01R 31/327
H02H 3/00

US Classification:

324509, 324424, 361 42

Abstract:

A self-test circuit is provided that includes a signal circuit adapted to periodically output a circuit inhibitor signal to inhibit a breaking signal from a ground fault detector. The signal circuit is also adapted to periodically output a test signal simulating a ground fault. The self-test circuit also includes an alarm circuit adapted to receive an output signal from the ground fault detector in response to detecting the ground fault, and adapted to output an alarm when the ground fault detector is not operative. The signal circuit may be further adapted to periodically output a second test signal simulating a grounded neutral condition. A ground fault circuit interrupter system and a method are also provided.

US Patent:

20040264088, Dec 30, 2004

Filed:

Oct 14, 2003

Appl. No.:

10/685157

Inventors:

William Hooper - Duluth GA, US
Scott Turner - Lilburn GA, US

Assignee:

Siemens Energy & Automation, Inc.

International Classification:

H02H003/24

US Classification:

361/092000

Abstract:

A method and apparatus for an undervoltage relay control apparatus monitoring voltage of the circuit breaker. The undervoltage relay controller apparatus comprises a housing with a latch assembly mounted in the housing. The latch assembly includes a latch mechanism and a solenoid, with the solenoid in selective contact with the latch mechanism. An electrical circuit, having a voltage input and a voltage output is mounted in the housing and coupled to the latch assembly. Wherein a control voltage input to the electrical circuit is conditioned, independently of parameters of the solenoid, and wherein if the received control voltage input is less than a predefined voltage, the electrical circuit will remove power to the solenoid allowing the solenoid to contact the latch mechanism and trip the circuit breaker.

US Patent:

20130205332, Aug 8, 2013

Filed:

Jun 19, 2012

Appl. No.:

13/527520

Inventors:

Michael Martin - Los Angeles CA, US
Daniel Siewers - Valencia CA, US
William Hooper - Glendale CA, US
David Potter - Altadena CA, US
Richard Hill - Glendale CA, US
Michael Strein - Bohemia NY, US
Kenneth Michel - Brightwaters NY, US
Alfredo Vincenty - Valencia CA, US
James Casabella - La Crescenta CA, US
David Converse - Valencia CA, US
Guy Beverlin - Salt Lake City UT, US

International Classification:

H04N 7/025

US Classification:

725 32

Abstract:

There is provided a content automation system and a method for use by the content automation system for issuing a content management message for use in a program stream. In one implementation, such a content automation system comprises a processor and a memory, and a stream messaging module residing in the memory. The stream messaging module is configured to issue the content management message by embedding a command sequence as metadata in a container data structure, and inserting the container data structure into the program stream. The command sequence authorizes a replacement of program stream content.

US Patent:

49207172, May 1, 1990

Filed:

May 11, 1989

Appl. No.:

7/350602

Inventors:

William J. Hooper - Duluth GA

Assignee:

Kawneer Company, Inc. - Norcross GA

International Classification:

E04H 1714
E04B 162

US Classification:

52400

Abstract:

An ornamental handrail assembly is disclosed which provides an improved base assembly for mounting the glass panels such that the panels are easily leveled without removing the panels from the base assembly. The mounting arrangement necessitates fewer parts and requires less labor to set and adjust the panels. In another aspect, the ornamental handrail system includes a cap rail member which is secured to the upper edge of the glass panels quickly and easily and without the need for adhesives or separate fasteners.

US Patent:

63073528, Oct 23, 2001

Filed:

Jun 23, 2000

Appl. No.:

9/602052

Inventors:

William P. Hooper - Norcross GA

Assignee:

Enrev Corporation - Norcross GA

International Classification:

H02J 704

US Classification:

320139

Abstract:

A controller (10) controls the application of charge pulses and discharge (depolarization) pulses to a battery (26) via a charge pulse circuit (22) and a discharge pulse circuit (24). A feedback circuit (18) allows the controller to monitor and adjust the charging process. A wave shaper (12) shapes the waveform of the charge pulses so as to limit the rise time of the charge pulses and thereby reduce reflected voltages and currents. A limiter (14) disables the charging circuit in the event that the controller should specify a charge pulse having an excessive duration or a continuous duration. Another limiter (16) limits the duration of the discharge pulses in the event that the controller should specify a discharge pulse having an excessive duration or a continuous duration. The charge pulse circuit is disabled whenever the controller specifies the application of a discharge pulse, and the discharge circuit is disabled whenever the controller specifies the application of a charge pulse. This prevents the simultaneous application of a charge pulse and a discharge pulse.

US Patent:

55571409, Sep 17, 1996

Filed:

Apr 12, 1995

Appl. No.:

8/420959

Inventors:

Chanh M. Nguyen - Newbury Park CA
Michael G. Case - Thousand Oaks CA
William W. Hooper - Westlake Village CA
Authi A. Narayanan - Thousand Oaks CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

H01L 2993

US Classification:

257596

Abstract:

A doping profile is disclosed for realizing a varactor diode that exhibits a high breakdown voltage V. sub. BR, e. g. ,>100 volts, and a capacitance which has a bi-level characteristic. In particular, the capacitance has a C. sub. max level and a C. sub. min level. The doping profile includes two lightly doped regions and, between them, a third region with higher doping. The doping concentrations and widths of the first two regions substantially set the tuning ratio of C. sub. max /C. sub. min, and the doping concentration and width of the third region substantially sets the transition voltage V. sub. TR between the bi-level capacitances.

US Patent:

54686598, Nov 21, 1995

Filed:

Mar 10, 1994

Appl. No.:

8/209339

Inventors:

Madjid Hafizi - Santa Monica CA
William E. Stanchina - Thousand Oaks CA
William W. Hooper - Westlake Village CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

H01L 21265
H01L 2120

US Classification:

437 31

Abstract:

A photoresist process combined with wet chemical etching and silicon oxide evaporation and self-aligned lift-off is used to reduce the parasitic (extrinsic) base-collector junction capacitance (C. sub. BC) of InP-based heterojunction bipolar transistors (HBTs). At least a portion of the mesa related to the base contact is etched around the intrinsic device area and then back-filled with evaporated oxide. The base contact pad is then formed over the back-filled oxide, thus reducing the extrinsic device area. This process provides a self-aligned etching of a mesa and deposition and lift-off of the back-fill oxide in one single photoresist processing step. The process is simple and reproducible and provides very high yield. It also eliminates the need for costly and complicated dry-etching techniques.