William I Lynch

US Patent:

6879526, Apr 12, 2005

Filed:

Oct 31, 2002

Appl. No.:

10/284198

Inventors:

William Thomas Lynch - Apex NC, US
David James Herbison - Arvada CO, US

Assignee:

Ring Technology Enterprises LLC - Reston VA

International Classification:

G11C007/00

US Classification:

36518912, 365233, 365239, 365240, 365221, 365 78

Abstract:

A memory access scheme employing one or more sets of shift registers interconnected in series to which data may be loaded from or written into one or more memory devices. That is, data from the memory devices may be parallel loaded into the sets of shift registers and then serially shifted through the shift registers until it is output from the sets of shift registers and transferred to its destination. Additionally, the data may be read from and loaded into the memory devices to/from the sets of shift registers such that the shifting of the shift registers is uninterrupted during the reading and/or loading of data. Additionally, data from the memory devices may be loaded into two or more parallel chains of shift registers and then serially shifted through the shift register chains.

US Patent:

7313035, Dec 25, 2007

Filed:

Jan 10, 2005

Appl. No.:

11/030881

Inventors:

William Thomas Lynch - Apex NC, US
David James Herbison - Arvada CO, US

Assignee:

Ring Technology Enterprises, LLC. - Reston VA

International Classification:

G11C 7/00

US Classification:

36518912, 36518911, 365233

Abstract:

A memory access scheme employing one or more sets of shift registers interconnected in series to which data may be loaded from or written into one or more memory devices. That is, data from the memory devices may be parallel loaded into the sets of shift registers and then serially shifted through the shift registers until it is output from the sets of shift registers and transferred to its destination. Additionally, the data may be read from and loaded into the memory devices to/from the sets of shift registers such that the shifting of the shift registers is uninterrupted during the reading and/or loading of data. Additionally, data from the memory devices may be loaded into two or more parallel chains of shift registers and then serially shifted through the shift register chains.

US Patent:

7808844, Oct 5, 2010

Filed:

May 29, 2007

Appl. No.:

11/806012

Inventors:

William Thomas Lynch - Apex NC, US
David James Herbison - Arvada CO, US

Assignee:

Ring Technology Enterprises os Texas, LLC - Tyler TX

International Classification:

G11C 7/00

US Classification:

36518912, 36518511, 3652331

Abstract:

A memory access scheme employing one or more sets of shift registers interconnected in series to which data may be loaded from or written into one or more memory devices. That is, data from the memory devices may be parallel loaded into the sets of shift registers and then serially shifted through the shift registers until it is output from the sets of shift registers and transferred to its destination. Additionally, the data may be read from and loaded into the memory devices to/from the sets of shift registers such that the shifting of the shift registers is uninterrupted during the reading and/or loading of data. Additionally, data from the memory devices may be loaded into two or more parallel chains of shift registers and then serially shifted through the shift register chains.

US Patent:

20090055266, Feb 26, 2009

Filed:

May 22, 2008

Appl. No.:

12/125703

Inventors:

Edward BRODY - Washington DC, US
William Lynch - Washington DC, US
Robert Kerner - Ashburn VA, US

International Classification:

G06Q 30/00

US Classification:

705 14, 705 30, 705 34

Abstract:

A method of, and system for, facilitating electronic commerce transaction comprises: steps for, or server component, receiving an indication of purchase of a first product from a first seller, sending an offer for a second product of a second seller to the first seller, allowing the first seller to accept and complete purchase of the second product without providing billing information of the customer to the second seller. The method and system may further provide a subscription management of multiple subscriptions from different subscription sellers.

US Patent:

54496420, Sep 12, 1995

Filed:

Apr 14, 1994

Appl. No.:

8/227659

Inventors:

Teh Y. Tan - Chapel Hill NC
Gary E. McGuire - Chapel Hill NC
William T. Lynch - Apex NC

Assignee:

Duke University - Durham NC
MCNC - Triangle Park NC

International Classification:

H01L 2144
H01L 2148

US Classification:

437200

Abstract:

A method of forming a metal-disilicide (MSi. sub. 2) film from a silicon-on-insulator (SOI) substrate having an insulating underlayer and a silicon outerlayer includes the formation of a first capping layer on a portion of the silicon outerlayer. The first capping layer preferably includes titanium and a preselected metal (M) such as cobalt. A step is then performed to convert a first portion of the silicon outerlayer to metal-disilicide. This step is preferably accomplished by a rapid thermal annealing step. Thereafter, a second capping layer is formed on the metal-disilicide layer. The second capping layer preferably includes titanium and metal-monosilicide (MSi). Next, a step is performed to convert a second portion of the silicon outerlayer, beneath the first portion, to metal-disilicide while preventing phase-reversal of the already formed metal-disilicide layer to metal-monosilicide. This step is preferably accomplished by a rapid thermal annealing step as well. The method can preferably be used to form low resistance metal-disilicide contacts to active regions of SOI electronic devices.

US Patent:

55392148, Jul 23, 1996

Filed:

Feb 6, 1995

Appl. No.:

8/384166

Inventors:

William T. Lynch - Apex NC
Kang L. Wang - Santa Monica CA
Martin O. Tanner - Duarte CA

Assignee:

Regents of the University of California - Oakland CA

International Classification:

H01L 2906
H01L 310328

US Classification:

257 15

Abstract:

A quantum bridge structure including wires of a semiconductor material such as silicon which are formed by selectively etching a superlattice of alternating layers of at least two semiconductor materials. The quantum bridge is useful as a photo emission device, a photo detector device, and a chemical sensor. The wires exhibit improved electrical conduction properties due to decreased Coulomb scattering.

US Patent:

56309058, May 20, 1997

Filed:

Jun 5, 1995

Appl. No.:

8/465493

Inventors:

William T. Lynch - Apex NC
Kang L. Wang - Santa Monica CA
Martin O. Tanner - Duarte CA

Assignee:

The Regents of the University of California - Los Angeles CA

International Classification:

H01L 2120

US Classification:

438507

Abstract:

A quantum bridge structure including wires of a semiconductor material such as silicon which are formed by selectively etching a superlattice of alternating layers of at least two semiconductor materials. The quantum bridge is useful as a photo emission device, a photo detector device, and a chemical sensor. The wires exhibit improved electrical conduction properties due to decreased Coulomb scattering.

Address:

1304 Annapolis Dr, Raleigh, NC 27608

Phone:

9198214560

VIN:

1GNSKJE7XCR259701

Make:

CHEVROLET

Model:

SUBURBAN

Year:

2012