William H Rollins

US Patent:

20120027416, Feb 2, 2012

Filed:

Jul 30, 2010

Appl. No.:

12/847178

Inventors:

William E. Rollins - Fremont CA, US
Eric S. Forbes - Canton GA, US
Arvind Ramdas Mallya - Walnut Creek CA, US

Assignee:

AT&T INTELLECTUAL PROPERTY I, L.P. - Reno NV

International Classification:

H04B 10/00

US Classification:

398116

Abstract:

A network interface device (NID) demarcates an access network and a premises network. The NID receives a broadband signal via an access network and transmits optical device signals to pieces of premises equipment. The broadband signal may be a single-mode fiber (SMF) optical signal transmitted over an SMF cable. In these embodiments, the NID may include a transponder including a first stage to convert the SMF signal to an intermediate electrical signal and a second stage to convert the intermediate electrical signal to a premises optical signal. In other embodiments, the broadband signal may be a very high bit rate digital subscriber line (VDSL) or other type of electrical signal and the NID's transponder may convert the VDSL signal to the premises optical signal. The NID may further include a multiplexer to multiplex the premises optical signal into the optical device signals for delivery to premises devices via corresponding premises device ports and plastic optical fiber cables.

US Patent:

20160026589, Jan 28, 2016

Filed:

Jul 25, 2014

Appl. No.:

14/341456

Inventors:

- Sunnyvale CA, US
William Leo Rollins - Sunnyvale CA, US
Robert Walker - Sunnyvale CA, US

International Classification:

G06F 13/40
G06F 13/42

Abstract:

A system and method for adaptive bus configuration operable to respond to hardware changes and other configuration changes is disclosed. In an embodiment, the computing system includes a circuit assembly having at least one processing resource coupled to a respective set of bus traces, at least one peripheral device socket coupled to a respective set of bus traces, and a bus switch coupled to the bus traces of the processing resource and the bus traces of the peripheral device. The bus switch implements a set of connections between the bus traces of the processing resource and the bus traces of the peripheral device sockets according to an instruction. The instruction may specify an allocation of peripheral device sockets to processing resources based on the number of installed processing resources so that no peripheral device is connected to a bus without an attached processor.