Ya Kuang Cao

US Patent:

20050091633, Apr 28, 2005

Filed:

Nov 16, 2004

Appl. No.:

10/989972

Inventors:

Jun Ye - Palo Alto CA, US
Yen-Wen Lu - Los Altos CA, US
Ya Cao - Cupertino CA, US
Luoqi Chen - San Jose CA, US
Xun Chen - Palo Alto CA, US

International Classification:

G06F017/50

US Classification:

716020000

Abstract:

There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques. In this regard, in one embodiment, the present invention employs a lithography simulation system architecture, including application-specific hardware accelerators, and a processing technique to accelerate and facilitate verification, characterization and/or inspection of a mask design, for example, RET design, including detailed simulation and characterization of the entire lithography process to verify that the design achieves and/or provides the desired results on final wafer pattern. The system includes: (1) general purpose-type computing device(s) to perform the case-based logic having branches and inter-dependency in the data handling and (2) accelerator subsystems to perform a majority of the computation intensive tasks.

US Patent:

20050076322, Apr 7, 2005

Filed:

Apr 1, 2004

Appl. No.:

10/815573

Inventors:

Jun Ye - Palo Alto CA, US
Yen-Wen Lu - Los Altos CA, US
Ya Cao - Cupertino CA, US
Luoqi Chen - San Jose CA, US
Xun Chen - Palo Alto CA, US

International Classification:

G06F017/50

US Classification:

716020000

Abstract:

There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques. In this regard, in one embodiment, the present invention employs a lithography simulation system architecture, including application-specific hardware accelerators, and a processing technique to accelerate and facilitate verification, characterization and/or inspection of a mask design, for example, RET design, including detailed simulation and characterization of the entire lithography process to verify that the design achieves and/or provides the desired results on final wafer pattern. The system includes: (1) general purpose-type computing device(s) to perform the case-based logic having branches and inter-dependency in the data handling and (2) accelerator subsystems to perform a majority of the computation intensive tasks.