Yang Li

US Patent:

7700985, Apr 20, 2010

Filed:

Jun 24, 2008

Appl. No.:

12/144697

Inventors:

Haiwen Xi - Prior Lake MN, US
Wei Tian - Bloomington MN, US
Yang Li - Shoreview MN, US
Insik Jin - Eagan MN, US
Song S. Xue - Edina MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

H01L 29/94
G11C 16/06

US Classification:

257297, 36518522

Abstract:

Ferroelectric memory using multiferroics is described. The multiferroic memory includes a substrate having a source region, a drain region and a channel region separating the source region and the drain region. An electrically insulating layer is adjacent to the source region, drain region and channel region. A data storage cell having a composite multiferroic layer is adjacent to the electrically insulating layer. The electrically insulating layer separated the data storage cell form the channel region. A control gate electrode is adjacent to the data storage cell. The data storage cell separates at least a portion of the control gate electrode from the electrically insulating layer.

US Patent:

7795606, Sep 14, 2010

Filed:

Oct 30, 2008

Appl. No.:

12/261137

Inventors:

Insik Jin - Eagan MN, US
Yang Li - Shoreview MN, US
Dadi Setiadi - Edina MN, US
Song S. Xue - Edina MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

H01L 29/04

US Classification:

257 3, 257E45002, 438382

Abstract:

Method and apparatus for constructing a non-volatile memory cell, such as a modified RRAM cell. In some embodiments, a memory cell comprises a resistive storage layer disposed between a first electrode layer and a second electrode layer. Further in some embodiments, the storage layer has a localized region of decreased thickness to facilitate formation of a conductive filament through the storage layer from the first electrode to the second electrode.

US Patent:

7852663, Dec 14, 2010

Filed:

May 23, 2008

Appl. No.:

12/125975

Inventors:

Haiwen Xi - Prior Lake MN, US
Yang Li - Shoreview MN, US
Song S. Xue - Edina MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

G11C 11/00

US Classification:

365158, 365171, 365173, 365209, 365 66

Abstract:

Spin torque magnetic logic device having at least one input element and an output element. Current is applied through the input element(s), and the resulting resistance or voltage across the output element is measured. The input element(s) include a free layer and the output element includes a free layer that is electrically connected to the free layer of the input element. The free layers of the input element and the output element may be electrically connected via magnetostatic coupling, or may be physically coupled. In some embodiments, the output element may have more than one free layer.

US Patent:

7948045, May 24, 2011

Filed:

Aug 18, 2008

Appl. No.:

12/193065

Inventors:

Yang Li - Bloomington MN, US
Insik Jin - Eagan MN, US
Harry Liu - Maple Grove MN, US
Song S. Xue - Edina MN, US
Shuiyuan Huang - Apple Valley MN, US
Michael X. Tang - Bloomington MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

H01L 29/82
H01L 21/00
H01L 21/336

US Classification:

257421, 257295, 257315, 257427, 257E29272, 257E293, 257E29324, 257E29436, 257E21665, 438 3, 438 48, 438257

Abstract:

A transistor device includes a magnetic field source adapted to deflect a flow of free electron carriers within a channel of the device, between a source region and a drain region thereof. According to preferred configurations, the magnetic field source includes a magnetic material layer extending over a side of the channel that is opposite a gate electrode of the transistor device.

US Patent:

7961503, Jun 14, 2011

Filed:

Jan 19, 2009

Appl. No.:

12/355908

Inventors:

Insik Jin - Eagan MN, US
Yang Li - Shoreview MN, US
Hongyue Liu - Maple Grove MN, US
Song S. Xue - Edina MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

G11C 11/00

US Classification:

365158, 36518518

Abstract:

An apparatus includes at least one memory device including a floating gate element and a magnetic field generator that operably applies a magnetic field to the memory device. The magnetic field directs electrons in the memory device into the floating gate element.

US Patent:

7974119, Jul 5, 2011

Filed:

Jul 10, 2008

Appl. No.:

12/170549

Inventors:

Yiran Chen - Eden Prairie MN, US
Hai Li - Eden Prairie MN, US
Hongyue Liu - Maple Grove MN, US
Yong Lu - Rosemount MN, US
Yang Li - Bloomington MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

G11C 11/00

US Classification:

365158, 365148, 365171, 977935

Abstract:

A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.

US Patent:

8179716, May 15, 2012

Filed:

Nov 24, 2010

Appl. No.:

12/953544

Inventors:

Haiwen Xi - Prior Lake MN, US
Yang Li - Shoreview MN, US
Song S. Xue - Edina MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

G11C 11/00

US Classification:

365158, 365171, 365173, 365209, 365 66

Abstract:

Spin torque magnetic logic device having at least one input element and an output element. Current is applied through the input element(s), and the resulting resistance or voltage across the output element is measured. The input element(s) include a free layer and the output element includes a free layer that is electrically connected to the free layer of the input element. The free layers of the input element and the output element may be electrically connected via magnetostatic coupling, or may be physically coupled. In some embodiments, the output element may have more than one free layer.

US Patent:

8192087, Jun 5, 2012

Filed:

May 27, 2009

Appl. No.:

12/473243

Inventors:

Alan L. Grantz - Aptos CA, US
Dadi Setiadi - Edina MN, US
Yang Li - Bloomington MN, US

Assignee:

Seagate Technology LLC - Scotts Valley CA

International Classification:

F16C 32/06

US Classification:

384107, 384112, 384110

Abstract:

A fluid dynamic bearing formed by a microelectromechanical systems (MEMS) wafer-level batch-fabrication process is provided. The process results in a high performance and high reliability fluid dynamic bearing having features including higher bearing lifetime at high RPM, improved bearing stiffness, durability and thrust/restoring forces capabilities. The present invention is especially useful with small form factor disc drive memory devices having constraints in motor height, such as a 2. 5 inch disc drive, requiring high performance including high rotational speed and large areal density. A sacrificial layer is utilized in the process to simultaneously form symmetrical facing surfaces of relatively rotatable components. The facing surfaces define, therebetween, a desired feature, such as a journal bearing, a thrust bearing, a fluid channel, a fluid reservoir, a capillary seal, pressure generating grooves, and other profile geometries. Such geometry control allows for design freedom in obtaining a desired bearing performance and stiffness.