Yasuhide Sato

US Patent:

20080147913, Jun 19, 2008

Filed:

Oct 27, 2006

Appl. No.:

11/588971

Inventors:

John Flores Miguel - Pittsburg CA, US
Bonnie H. Caballero - Sunnyvale CA, US
Yasuhide Sato - San Ramon CA, US
Barry Sia - Concord CA, US
Paolo A. Tamayo - San Ramon CA, US

Assignee:

Kyocera Mita Corporation - Osaka-shi
Kyocera Technology Development, Inc. - Concord CA

International Classification:

G06F 3/00

US Classification:

710 48

Abstract:

A method for interfacing single transfer and burst transfer components, comprising: processing transfer completion of a byte in burst transfer as an interrupt; maintaining the current state of signal lines to prevent occurrence of next interrupt; copying the transferred byte from buffer to memory; and allowing next interrupt; and enabling sending of next byte in burst transfer. This invention interfaces incompatible signaling of the components, and solves the handshake, communication and buffering problems involved. The methods also include polling simulating an interrupt, prevention of premature transfer and overwrite, interrupt on an edge of a busy signal, disabling and enabling clock to maintain current status, packet exchange protocol involving header, body and checksum, command and status packets, copying task waiting on a blocking semaphore which is signaled by interrupt handler task, and signals from a first component routed to a conversion component which generates new signals compatible with the second component.