Yiran Chen

from Minneapolis, MN

Yiran Chen Phones & Addresses

  • Minneapolis, MN
  • Saint Paul, MN

Us Patents

  • Oscillating Current Assisted Spin Torque Magnetic Memory

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  • US Patent:
    7800938, Sep 21, 2010
  • Filed:
    Oct 15, 2008
  • Appl. No.:
    12/251603
  • Inventors:
    Kirill Rivkin - Edina MN,
    Yiran Chen - Eden Prairie MN,
    Xiaobin Wang - Chanhassen MN,
    Haiwen Xi - Prior Lake MN,
  • Assignee:
    Seagate Technology, LLC - Scotts Valley CA
  • International Classification:
    G11C 11/00
  • US Classification:
    365158, 365171, 365173
  • Abstract:
    A memory unit having a spin torque memory cell with a ferromagnetic free layer, a ferromagnetic pinned layer and a spacer layer therebetween, with the free layer having a switchable magnetization orientation with a switching threshold. A DC current source is electrically connected to the spin torque memory cell to cause spin transfer torque in the free layer. An AC current source is electrically connected to the spin torque memory cell to produce an oscillatory polarized current capable of spin transfer torque via resonant coupling with the free layer.
  • Magnetic Random Access Memory (Mram) Utilizing Magnetic Flip-Flop Structures

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  • US Patent:
    8295072, Oct 23, 2012
  • Filed:
    Mar 29, 2011
  • Appl. No.:
    13/074384
  • Inventors:
    Dimitar V. Dimitrov - Edina MN,
    Olle Gunnar Heinonen - Eden Prairie MN,
    Yiran Chen - Eden Prairie MN,
    Haiwen Xi - Prior Lake MN,
    Xiaohua Lou - Bloomington MN,
  • Assignee:
    Seagate Technology LLC - Scotts Valley CA
  • International Classification:
    G11C 17/06
  • US Classification:
    365105, 365115, 365171, 365243
  • Abstract:
    Non-volatile magnetic random access memory (MRAM) devices that include magnetic flip-flop structures that include a magnetization controlling structure; a first tunnel barrier structure; and a magnetization controllable structure that includes a first polarizing layer; and a first stabilizing layer, wherein the first tunnel barrier structure is between the magnetization controllable structure and the magnetization controlling structure and the first polarizing layer is between the first stabilizing layer and the first tunnel barrier structure, wherein the magnetic flip-flop device has two stable overall magnetic; configurations a second tunnel barrier structure and a reference layer, wherein the second tunnel barrier structure is between the magnetic flip-flop device and the reference layer.
  • Tunable Random Bit Generator With Magnetic Tunnel Junction

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  • US Patent:
    8495118, Jul 23, 2013
  • Filed:
    Mar 6, 2009
  • Appl. No.:
    12/399127
  • Inventors:
    Xiaobin Wang - Chanhassen MN,
    Wenzhong Zhu - Apple Valley MN,
    Henry Huang - Apple Valley MN,
    Yiran Chen - Eden Prairie MN,
    Haiwen Xi - Prior Lake MN,
  • Assignee:
    Seagate Technology LLC - Cupertino CA
  • International Classification:
    G06F 7/58
    G11C 11/00
    G11C 7/00
  • US Classification:
    708250, 708 3, 708209, 708210, 365158, 365171
  • Abstract:
    A random number generator device that utilizes a magnetic tunnel junction. An AC current source is in electrical connection to the magnetic tunnel junction to provide an AC current having an amplitude and a frequency through the free layer of the magnetic tunnel junction, the AC current configured to switch the magnetization orientation of the free layer via thermal magnetization. A read circuit is used to determine the relative orientation of the free layer magnetization in relation to the reference layer magnetization orientation.
  • Non-Volatile Memory With Hybrid Index Tag Array

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  • US Patent:
    8489801, Jul 16, 2013
  • Filed:
    Mar 4, 2009
  • Appl. No.:
    12/397569
  • Inventors:
    Henry F. Huang - Apple Valley MN,
    Yiran Chen - Eden Prairie MN,
  • International Classification:
    G06F 12/08
  • US Classification:
    711101, 711103, 711108, 711207
  • Abstract:
    Various embodiments of the present invention are generally directed to an apparatus and associated method for a non-volatile memory with a hybrid index tag array. In accordance with some embodiments, a memory device has a word memory array formed of non-volatile resistive sense memory (RSM) cells, a first index array formed of volatile content addressable memory (CAM) cells, and a second index array formed of non-volatile RSM cells. The memory device is configured to output word data from the word memory array during a data retrieval operation when input request data matches tag data stored in the first index array, and to copy tag data stored in the second index array to the first index array during a device reinitialization operation.
  • Diode Assisted Switching Spin-Transfer Torque Memory Unit

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  • US Patent:
    8482971, Jul 9, 2013
  • Filed:
    May 16, 2012
  • Appl. No.:
    13/472867
  • Inventors:
    Xuguang Wang - Eden Prairie MN,
    Yiran Chen - Eden Prairie MN,
    Dimitar V. Dimitrov - Edina MN,
    Hongyue Liu - Maple Grove MN,
    Xiaobin Wang - Chanhassen MN,
  • Assignee:
    Seagate Technology LLC - Scotts Valley CA
  • International Classification:
    G11C 11/14
  • US Classification:
    365171, 365173, 365158, 365175
  • Abstract:
    A memory array includes a cross-point array of bit and source lines. A memory is disposed at cross-points of the cross-point array. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. A transistor is electrically between the magnetic tunnel junction data cell and the bit line or source line and a diode is in thermal or electrical contact with the magnetic tunnel junction data cell to assist in resistance state switching.
  • Transmission Gate-Based Spin-Transfer Torque Memory Unit

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  • US Patent:
    8416615, Apr 9, 2013
  • Filed:
    May 18, 2012
  • Appl. No.:
    13/474839
  • Inventors:
    Yiran Chen - Eden Prairie MN,
    Hai Li - Eden Prairie MN,
    Hongyue Liu - Maple Grove MN,
    Yong Lu - Rosemount MN,
    Yang Li - Bloomington MN,
  • Assignee:
    Seagate Technology LLC - Scotts Valley CA
  • International Classification:
    G11C 11/00
  • US Classification:
    365158, 365148, 365171, 977935
  • Abstract:
    A transmission gate-based spin-transfer torque memory unit is described. The memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a source line. A NMOS transistor is in parallel electrical connection with a PMOS transistor and they are electrically connected with the source line and the magnetic tunnel junction data cell. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a polarized write current through the magnetic tunnel junction data cell. The PMOS transistor and the NMOS transistor are separately addressable so that a first write current in a first direction flows through the PMOS transistor and a second write current in a second direction flows through the NMOS transistor.
  • Spin-Transfer Torque Memory Non-Destructive Self-Reference Read Method

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  • US Patent:
    8416614, Apr 9, 2013
  • Filed:
    Jan 12, 2012
  • Appl. No.:
    13/349044
  • Inventors:
    Yiran Chen - Eden Prairie MN,
    Hai Li - Eden Prairie MN,
    Hongyue Liu - Maple Grove MN,
    Ran Wang - Eden Prairie MN,
    Dimitar V. Dimitrov - Edina MN,
  • Assignee:
    Seagate Technology LLC - Scotts Valley CA
  • International Classification:
    G11C 11/00
  • US Classification:
    365158, 365148, 365171, 3652255, 3652435
  • Abstract:
    A method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage. The magnetic tunnel junction data cell has a first resistance state. Then the method includes applying a second read current thorough the magnetic tunnel junction data cell having the first resistance state. The first read current is less than the second read current. Then the first bit line read voltage is compared with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.
  • Spin-Transfer Torque Memory Self-Reference Read Method

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  • US Patent:
    8411495, Apr 2, 2013
  • Filed:
    Jan 12, 2012
  • Appl. No.:
    13/349052
  • Inventors:
    Hai Li - Eden Prairie MN,
    Yiran Chen - Eden Prairie MN,
    Hongyue Liu - Maple Grove MN,
    Kang Yong Kim - Boise ID,
    Dimitar V. Dimitrov - Edina MN,
    Henry F. Huang - Appl MN,
  • Assignee:
    Seagate Technology LLC - Scotts Valley CA
  • International Classification:
    G11C 11/00
  • US Classification:
    365158, 365148, 365171, 3652255, 3652435, 977933
  • Abstract:
    A spin-transfer torque memory apparatus and self-reference read schemes are described. One method of self-reference reading a spin-transfer torque memory unit includes applying a first read current through a magnetic tunnel junction data cell and forming a first bit line read voltage, the magnetic tunnel junction data cell having a first resistance state and storing the first bit line read voltage in a first voltage storage device. Then applying a low resistance state polarized write current through the magnetic tunnel junction data cell, forming a low second resistance state magnetic tunnel junction data cell. A second read current is applied through the low second resistance state magnetic tunnel junction data cell to forming a second bit line read voltage. The second bit line read voltage is stored in a second voltage storage device. The method also includes comparing the first bit line read voltage with the second bit line read voltage to determine whether the first resistance state of the magnetic tunnel junction data cell was a high resistance state or low resistance state.

Resumes

Yiran Chen Photo 1

Assistant Professor At University Of Pittsburgh

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Location:
Greater Minneapolis-St. Paul Area
Industry:
Computer Hardware
Yiran Chen Photo 2

Staff Engineer At Seagate Technology

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Location:
Greater Minneapolis-St. Paul Area
Industry:
Computer Hardware

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(YiRan Chen)

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ハジメマシテ、コンニチハ。
Tagline:
我要的是奇蹟不是毅力
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