Yong S Wang

US Patent:

6434044, Aug 13, 2002

Filed:

Feb 16, 2001

Appl. No.:

09/788120

Inventors:

Geoffrey Steven Gongwer - Los Altos CA
Kevin M. Conley - San Jose CA
Chi-Ming Wang - Fremont CA
Yong Liang Wang - Saratoga CA
Raul Adrian Cernea - Santa Clara CA

Assignee:

SanDisk Corporation - Sunnyvale CA

International Classification:

G11C 1604

US Classification:

36518518, 36518511, 365226

Abstract:

Techniques for producing and supplying various voltage levels within a memory system having multiple memory blocks (e. g. , memory chips) are described. The various voltage levels can be produced by voltage generation circuitry (e. g. , charge pump and/or regulator circuitry) within the memory system. The various voltage levels can be supplied to the multiple memory blocks through a power bus. According to one aspect, charge pump and/or regulator circuits are provided within at most one of the memory blocks of a memory system (unless back-ups are provided for fault tolerance), and a power bus is used to distribute the generated voltage levels to other of the memory blocks. According to another aspect, a memory controller generates multiple supply voltage levels that are distributed (e. g. , via a power bus) to each of the memory blocks.

US Patent:

6532485, Mar 11, 2003

Filed:

Sep 8, 1999

Appl. No.:

09/391166

Inventors:

Yong Wang - Mountain View CA

Assignee:

Sun Microsystems, Inc. - Palo Alto CA

International Classification:

G06F 738

US Classification:

708523

Abstract:

An apparatus for multiplying a first number and a second number together is described, each of the numbers having a width of 8, 16, 32, 64 or 128-bits or more. The 32-bit embodiment of the apparatus includes a booth recorder having two inputs and 16 outputs, the recorder determining 16 individual booth groups associated with the second number and providing one partial product per booth group on individual ones of the 16 outputs. The apparatus further includes first, second, third and fourth 4:2 compressors each having four inputs individually coupled to consecutive ones of the booth recorder outputs, a carry output and a sum output, fifth and sixth 4:2 compressors each having four inputs, the first and third inputs of the fifth and sixth compressors being individually coupled to the sum outputs of the first, second, third and fourth compressors respectively, the second and fourth inputs of the fifth and sixth compressors being individually coupled to the carry outputs of the first, second, third and fourth compressors respectively. The apparatus further includes a seventh 4:2 compressor having four inputs, the first and third inputs of the seventh compressor being individually coupled to the sum outputs of the fifth and sixth compressors respectively, the second and fourth inputs of the seventh compressor being individually coupled to the carry outputs of the fifth and sixth compressors respectively and an adder having two inputs individually coupled to the carry and sum outputs of the seventh compressor, and an output.

US Patent:

6683530, Jan 27, 2004

Filed:

Aug 28, 2002

Appl. No.:

10/230899

Inventors:

Yong Wang - Sunnyvale CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 702

US Classification:

3401462, 708495, 708671

Abstract:

A system, method and apparatus for comparing two floating point numbers is includes choosing a first floating point number and a second floating point number to be compared. The first number is sign extended one bit to create a first sign extended number. The second number is sign extended one bit to create a second sign extended number. The second sign extended number is subtracted from the first sign extended number to determine a subtraction result. The sign bits for said first number and said second number are examined to determine if they are both ones. If the sign bits for the first number and the second number are both ones, the sign bit of the subtraction result is inverted to create a final result. If the sign bit of the final result is a zero, asserting that the first number is greater than or equal to the second number. Alternatively, if the sign bit of the final result is a one, asserting that the first number is less than the second number.

US Patent:

6692534, Feb 17, 2004

Filed:

Sep 8, 1999

Appl. No.:

09/392070

Inventors:

Yong Wang - Mountain View CA
Allan Tzeng - San Jose CA

Assignee:

Sun Microsystems, Inc. - Santa Clara CA

International Classification:

G06F 752

US Classification:

708628, 708629, 708603

Abstract:

The present invention provides an apparatus for booth decoding which stores the most significant bit of the lower half of the number used as the key for booth decoding. By using this stored bit to determine the rightmost booth group corresponding to the upper half of the key, booth decoding may be accomplished more quickly using an apparatus that is simpler and smaller than prior art assemblies.

US Patent:

7447337, Nov 4, 2008

Filed:

Oct 25, 2004

Appl. No.:

10/972003

Inventors:

Tong Zhang - San Jose CA, US
Yong Wang - New York NY, US
Daniel R. Tretter - San Jose CA, US

Assignee:

Hewlett-Packard Development Company, L.P. - Houston TX

International Classification:

G06K 9/00
H04N 5/14
H04B 1/66

US Classification:

382107, 348699, 37524016

Abstract:

Methods and integrated systems for camera motion analysis and moving object analysis and methods of extracting semantics mainly from camera motion parameters in videos and video segments without shot changes are described. Typical examples of such videos are a home video taken by a digital camera and a segment, or clip, of a professional video or film. The extracted semantics can be directly used in a number of video/image understanding and management applications, such as annotation, browsing, editing, frame enhancement, key-frame extraction, panorama generation, printing, retrieval, summarization. Automatic methods of detecting and tracking moving objects that do not rely on a priori knowledge of the objects are also described. The methods can be executed in real time.

US Patent:

7579473, Aug 25, 2009

Filed:

Feb 26, 2009

Appl. No.:

12/393806

Inventors:

Lynne Canne Bannen - Pacifica CA, US
Diva Sze-Ming Chan - San Francisco CA, US
Timothy Patrick Forsyth - Hayward CA, US
Richard George Khoury - Redwood City CA, US
James William Leahy - San Leandro CA, US
Morrisson B. Mac - San Francisco CA, US
Larry W. Mann - Richland MI, US
John M. Nuss - Danville CA, US
Jason Jevious Parks - Sacramento CA, US
Yong Wang - Foster City CA, US
Wie Xu - Danville CA, US

Assignee:

Exelixis, Inc. - South San Francisco CA

International Classification:

C07D 215/38
A61K 31/47

US Classification:

546153, 514312

Abstract:

The present invention provides compounds for modulating protein kinase enzymatic activity for modulating cellular activities such as proliferation, differentiation, programmed cell death, migration and chemoinvasion. More specifically, the invention provides quinazolines and quinolines which inhibit, regulate, and/or modulate kinase receptor, particularly c-Met, KDF, c-Kit, flt-3 and flt-4, signal transduction pathways related to the changes in cellular activities as mentioned above, compositions which contain these compounds, and methods of using them to treat kinase-dependent diseases and conditions. The present invention also provides methods for making compounds as mentioned above, and compositions which contain these compounds.

US Patent:

7977345, Jul 12, 2011

Filed:

Jul 1, 2005

Appl. No.:

11/571140

Inventors:

Lynne Canne Bannen - Pacifica CA, US
Diva Sze-Ming Chan - San Francisco CA, US
Lisa Esther Dalrymple - San Leandro CA, US
Vasu Jammalamadaka - Pleasanton CA, US
Richard George Khoury - Redwood City CA, US
James William Leahy - San Leandro CA, US
Morrisson B. Mac - San Francisco CA, US
Grace Mann - Brisbane CA, US
Larry W. Mann - Richland MI, US
John M. Nuss - Danville CA, US
Jason Jevious Parks - Sacramento CA, US
Yong Wang - Foster City CA, US
Wie Xu - Danville CA, US

Assignee:

Exelixis, Inc. - South San Francisco CA

International Classification:

C07D 487/04
A61K 31/519
A61K 31/522

US Classification:

5142651, 544280, 544262, 544265, 5142621, 51426323, 5142633

Abstract:

A compound for modulating kinase activity according to Formula I,.

US Patent:

7989622, Aug 2, 2011

Filed:

Oct 9, 2006

Appl. No.:

11/988862

Inventors:

William Bajjalieh - San Francisco CA, US
Lynne Canne Bannen - Pacifica CA, US
S. David Brown - San Carlos CA, US
Patrick Kearney - San Francisco CA, US
Morrison B. Mac - San Francisco CA, US
Charles K. Marlowe - Emerald Hills CA, US
John M. Nuss - Danville CA, US
Zerom Tesfai - Castro Valley CA, US
Yong Wang - Foster City CA, US
Wei Xu - Danville CA, US

Assignee:

Exelixis, Inc. - South San Francisco CA

International Classification:

A61K 31/4985
A61K 31/498
C07D 241/36
C07D 403/14
C07D 471/04
A61P 35/02
A61P 35/00

US Classification:

544356, 514249, 544238, 544350

Abstract:

The present invention comprises small molecule inhibitors of phosphatidylinositol 3-kinase (PI3K), which is associated with a number of malignancies such as ovarian cancer, cervical cancer, breast cancer, colon cancer, rectal cancer, and glioblastomas, among others. Accordingly, the compounds of the present invention are useful for treating, preventing, and/or inhibiting these diseases.

Address:

1209 W Keats Ave, Mesa, AZ 85202

VIN:

1ZVHT85H475206892

Make:

FORD

Model:

MUSTANG

Year:

2007