Young L Shin

US Patent:

6710644, Mar 23, 2004

Filed:

Nov 29, 2001

Appl. No.:

09/995795

Inventors:

Ralph A. Duncan - Laguna Beach CA
Chun-Ying Chen - Irvine CA
Young J. Shin - Irvine CA

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03K 500

US Classification:

327558, 327 55

Abstract:

An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of a first capacitance value, wherein the first resistance value and the first capacitance value determine a corner frequency of the filter; and a tuning circuit having a second resistor of a second resistance value, a switched-capacitor of a third resistance value and a comparator that compares two voltage signals to produce a control signal, wherein the control signal adjusts the first and second resistance values as a function of the third resistance value. The corner frequency of the filter can be adjusted by varying one or more reference voltage signals. In combination, the corner frequency of the filter is adjusted by changing the frequency of a clock that controls the switched-capacitor to decrease the circuit sensitivity.

US Patent:

6894557, May 17, 2005

Filed:

Jan 30, 2004

Appl. No.:

10/767424

Inventors:

Ralph A. Duncan - Laguna Beach CA, US
Chun-Ying Chen - Irvine CA, US
Young J. Shin - Irvine CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03K005/00

US Classification:

327558, 327555

Abstract:

An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of a first capacitance value, wherein the first resistance value and the first capacitance value determine a corner frequency of the filter; and a tuning circuit having a second resistor of a second resistance value, a switched-capacitor of a third resistance value and a comparator that compares two voltage signals to produce a control signal, wherein the control signal adjusts the first and second resistance values as a function of the third resistance value. The corner frequency of the filter can be adjusted by varying one or more reference voltage signals. In combination, the corner frequency of the filter is adjusted by changing the frequency of a clock that controls the switched-capacitor to decrease the circuit sensitivity.

US Patent:

7053697, May 30, 2006

Filed:

Apr 13, 2005

Appl. No.:

11/104496

Inventors:

Ralph A. Duncan - Laguna Beach CA, US
Chun-Ying Chen - Laguna Beach CA, US
Young J. Shin - Laguna Beach CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H03K 5/00

US Classification:

327558, 327555

Abstract:

An integrated circuit formed on a semiconductor chip, comprising a low pass filter circuit having a first resistor of a first resistance value and a capacitor of a first capacitance value, wherein the first resistance value and the first capacitance value determine a corner frequency of the filter; and a tuning circuit having a second resistor of a second resistance value, a switched-capacitor of a third resistance value and a comparator that compares two voltage signals to produce a control signal, wherein the control signal adjusts the first and second resistance values as a function of the third resistance value. The corner frequency of the filter can be adjusted by varying one or more reference voltage signals. In combination, the corner frequency of the filter is adjusted by changing the frequency of a clock that controls the switched-capacitor to decrease the circuit sensitivity.

US Patent:

7139547, Nov 21, 2006

Filed:

Nov 29, 2001

Appl. No.:

09/995695

Inventors:

Myles Wakayama - Laguna Niguel CA, US
Dana Vincent Laub - Irvine CA, US
Frank Carr - Newport Beach CA, US
Afshin Mellati - Aliso Viejo CA, US
David S. P. Ho - Singapore, SG
Chun-Ying Chen - Irvine CA, US
James Y. C. Chang - Irvine CA, US
Lawrence M. Burns - Laguna Hills CA, US
Young Joon Shin - Irvine CA, US
Patrick Pai - Honolulu HI, US
Iconomos A. Koullias - Reading PA, US
Ron Lipka - Sinking Spring PA, US
Luke Thomas Steigerwald - Sinking Spring PA, US
Alexandre Kral - Laguna Niguel CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04B 1/28

US Classification:

455333, 455334, 455339, 455340, 455341

Abstract:

A direct conversion satellite tuner is fully integrated on a common substrate. The integrated tuner receives an RF signal having a plurality of channels and down-converts a selected channel directly to baseband for further processing. The integrated tuner includes on-chip local oscillator generation, tunable baseband filters, and DC Offset cancellation. The integrated tuner can be implemented in a completely differential I/Q configuration for improved electrical performance. The entire direct conversion satellite tuner can be fabricated on a single semiconductor substrate using standard CMOS processing, with minimal off-chip components. The tuner configuration described herein is not limited to processing TV signals, and can be utilized to down-convert other RF signals to an IF frequency or baseband.

US Patent:

7783275, Aug 24, 2010

Filed:

Oct 13, 2006

Appl. No.:

11/580228

Inventors:

Myles Wakayama - Laguna Niguel CA, US
Dana Vincent Laub - Irvine CA, US
Frank Carr - Newport Beach CA, US
Afshin Mellati - Aliso Viejo CA, US
David S. P. Ho - Singapore, SG
Chun-Ying Chen - Irvine CA, US
James Y. C. Chang - Irvine CA, US
Lawrence M. Burns - Laguna Hills CA, US
Young Joon Shin - Irvine CA, US
Patrick Pai - Honolulu HI, US
Iconomos A. Koullias - Reading PA, US
Ron Lipka - Sinking Spring PA, US
Luke Thomas Steigerwald - Sinking Spring PA, US
Alexandre Kral - Laguna Niguel CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04B 1/28

US Classification:

455333, 455141, 455146, 455147, 4552361, 4552521, 375316, 375345

Abstract:

A direct conversion satellite tuner is fully integrated on a common substrate. The integrated tuner receives an RF signal having a plurality of channels and down-converts a selected channel directly to baseband for further processing. The integrated tuner includes on-chip local oscillator generation, tunable baseband filters, and DC Offset cancellation. The integrated tuner can be implemented in a completely differential I/Q configuration for improved electrical performance. The entire direct conversion satellite tuner can be fabricated on a single semiconductor substrate using standard CMOS processing, with minimal off-chip components. The tuner configuration described herein is not limited to processing TV signals, and can be utilized to down-convert other RF signals to an IF frequency or baseband.

US Patent:

8107916, Jan 31, 2012

Filed:

Sep 3, 2009

Appl. No.:

12/553701

Inventors:

Francesco Gatta - Laguna Niguel CA, US
Ramon Gomez - San Juan Cap CA, US
Leonard Dauphinee - Irvine CA, US
Young Joon Shin - Irvine CA, US
Hanli Zou - Rancho Santa Margarita CA, US
Massimo Brandolini - Laguna Niguel CA, US
Giuseppe Cusmai - Irvine CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04B 1/10
H04K 3/00

US Classification:

455285, 4551871, 4551911, 455302, 455314, 455324

Abstract:

Systems and methods for demodulating a plurality of contiguous channels contained within a bandlimited portion of a radio-frequency (RF) input signal are provided. In an embodiment, the bandlimited portion of the RF input signal is down-converted to baseband. After down-conversion, the bandlimited portion overlaps at baseband with a mirror image of the bandlimited portion. The plurality of contiguous channels within the down-converted signal similarly overlap at baseband and subsequently occupy a bandwidth substantially equal to half that required before down-converting. Image rejection is performed in the digital domain to recover each of the plurality of overlapping channels.

US Patent:

8323466, Dec 4, 2012

Filed:

Dec 7, 2009

Appl. No.:

12/632661

Inventors:

Sunnie Park Kim - Manhattan Beach CA, US
Young Shik Shin - Pasadena CA, US
Changgeng Liu - Alhambra CA, US
Rory Kelly - Escalon CA, US
Becky Chan - Los Angeles CA, US

Assignee:

NanoIVD, Inc. - Los Angeles CA

International Classification:

H01L 51/10
H01L 51/30
G01N 27/00

US Classification:

20440301, 257 20, 257 40, 435 4, 435 61, 977702, 977734, 977938

Abstract:

A microfluidic-based lab-on-a-test card is described. The test card is used with a point-of-care (POC) analyzer. The test card is designed to receive a sample and then, with the use of the POC analyzer, quantify or count a particular substance in the sample. The test card may be comprised of multiple layers. In one embodiment, the test card includes a primary separation chamber with a filtration surface, a trapping channel, and a particle detector. The test card may also include a nanowire sensor.

US Patent:

8417200, Apr 9, 2013

Filed:

Sep 30, 2011

Appl. No.:

13/249741

Inventors:

Ray (Ramon) Gomez - San Juan Cap CA, US
Leonard Dauphinee - Irvine CA, US
Massimo Brandolini - Irvine CA, US
Jianhong Xiao - Irvine CA, US
Dongsoo Koh - Irvine CA, US
Young Shin - Irvine CA, US
Chonghua Zhong - Irvine CA, US
Rezaur Rahman Khan - Rancho Santa Margarita CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H04B 1/04
H03F 3/04

US Classification:

4551273, 330250, 330255

Abstract:

Embodiments provide transmitter topologies that improve the power efficiency and bandwidth of RF transmitters for high transmission power applications. In an embodiment, the common-emitter/source PA of conventional topologies is replaced with a current-input common-base/gate PA, which is stacked on top on an open-collector/drain current-output transmitter. The common-base/gate PA protects the output of the transmitter from large output voltage swings. The low input impedance of the common-base/gate PA makes the PA less susceptible to frequency roll-off, even in the presence of large parasitic capacitance produced by the transmitter. At the same time, the low input impedance of the common-base/gate PA reduces the voltage swing at the transmitter output and prevents the transmitter output from being compressed or modulated. In an embodiment, the DC output current of the transmitter is reused to bias the PA, which results in power savings compared to conventional transmitter topologies.