Yu C Chen

US Patent:

6968708, Nov 29, 2005

Filed:

Jun 23, 2003

Appl. No.:

10/602114

Inventors:

Sivakumar Gopalnarayanan - Simsbury CT, US
Yu Chen - East Hartford CT, US
Tobias Sienel - Manchester CT, US
Lili Zhang - East Hartford CT, US

Assignee:

Carrier Corporation - Syracuse NY

International Classification:

F25D017/02

US Classification:

62186, 62408

Abstract:

A transcritical refrigeration system includes a compressor, a gas cooler, an expansion device, and an evaporator. Refrigerant is circulated though the closed circuit system. Preferably, carbon dioxide is used as the refrigerant. A fan moves outdoor air that exchanges heat with the refrigerant across the evaporator. The speed of the fan is regulated to regulate the evaporator pressure and to adapt the evaporator to different environmental conditions to achieve the optimal coefficient of performance. During high ambient conditions, the fan speed is decreased, decreasing the refrigerant mass flowrate in the system. The energy exchange per unit mass of the refrigerant in the gas cooler increases and the work of the fan decreases, increasing the coefficient of performance of the system. During low ambient conditions, the mass flowrate of the system is low and there is more heat transfer thermal resistance on the refrigerant side at the evaporator. The speed of the fan is lowered to decrease the work of the fan.

US Patent:

7010925, Mar 14, 2006

Filed:

Jun 7, 2004

Appl. No.:

10/862589

Inventors:

Tobias Sienel - Easthampton MA, US
Yu Chen - East Hartford CT, US
Bryan Eisenhower - East Hartford CT, US
Julio Concha - Rocky Hill CT, US
Young Kyu Park - Simsbury CT, US
Lili Zhang - East Hartford CT, US
Jeffrey Nieter - Coventry CT, US
Nicolas Pondicq-Cassou - Lyons, FR

Assignee:

Carrier Corporation - Syracuse NY

International Classification:

F25B 1/00

US Classification:

62115, 62126

Abstract:

A method of detecting and diagnosing operating conditions for a heat pump water heating system includes the steps of monitoring system operating conditions and comparing actual operating conditions to predicted operating conditions. The predicted operating conditions are based on expected pressures and temperatures given current system inputs. A difference between the actual and expected values for refrigerant pressures and temperature outside a desired range provides indication of a fault in the system. The system controller initiates a prompt to alert of the need for maintenance and direct to potential causes.

US Patent:

7030412, Apr 18, 2006

Filed:

May 5, 2000

Appl. No.:

09/565413

Inventors:

Paul S. Drzaic - Lexington MA, US
Karl R. Amundson - Cambridge MA, US
Gregg M. Duthaler - Brookline MA, US
Peter T. Kazlas - Sudbury MA, US
Yu Chen - Cambridge MA, US

Assignee:

E Ink Corporation - Cambridge MA

International Classification:

H01L 29/04

US Classification:

257 59, 257 72

Abstract:

A thin-film transistor array comprises at least first and second transistors. Each transistor comprises a source electrode, a drain electrode a semiconductor electrode, a gate electrode, and a semiconductor layer. The semiconductor layer is continuous between the first and second transistors. The semiconductor layer is preferably unpatterned. In various display applications, the geometry of the transistors is selected to provide acceptable leakage currents. In a preferred embodiment, the transistor array is employed in an encapsulated electrophoretic display.

US Patent:

7893435, Feb 22, 2011

Filed:

Nov 25, 2003

Appl. No.:

10/707184

Inventors:

Peter T. Kazlas - Sudbury MA, US
Joanna F. Au - Brighton MA, US
Yu Chen - Milpitas CA, US
Nathan R. Kane - Arlington MA, US
David John Cole - Medway MA, US

Assignee:

E Ink Corporation - Cambridge MA

International Classification:

H01L 29/04

US Classification:

257 59, 257E51005, 257E29151, 359242, 359243, 359245, 438149

Abstract:

A backplane for use in an electro-optic display comprises a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.

US Patent:

20020060321, May 23, 2002

Filed:

Jul 12, 2001

Appl. No.:

09/904435

Inventors:

Peter Kazlas - Sudbury MA, US
Yu Chen - Cambridge MA, US
Kevin Denis - Beverly Farms MA, US
Paul Drzaic - Morgan Hill CA, US

International Classification:

H01L031/112
H01L031/036
H01L029/76

US Classification:

257/066000

Abstract:

A thin-film transistor array comprises at least first and second transistors. Each of the first and second transistors include a shared silicon layer, i.e., an active layer, having a thickness less than approximately 40 nm. The shared silicon layer extends continuously between the first and second transistors. The silicon layer may consist of unpatterned silicon. Heavily doped material may not be required at metal-silicon contact interfaces.

US Patent:

20040014265, Jan 22, 2004

Filed:

Apr 24, 2003

Appl. No.:

10/249624

Inventors:

Peter Kazlas - Sudbury MA, US
Karl Amundson - Cambridge MA, US
Yu Chen - Allston MA, US
Guy Danner - Somerville MA, US
Kevin Denis - Beverly Farms MA, US
Gregg Duthaler - Needham MA, US
Nathan Kane - Arlington MA, US
Andrew Ritenour - Medford MA, US

Assignee:

E INK CORPORATION - Cambridge MA

International Classification:

H01L021/8238

US Classification:

438/200000

Abstract:

A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

US Patent:

20110140744, Jun 16, 2011

Filed:

Jan 10, 2011

Appl. No.:

12/987418

Inventors:

Peter T. Kazlas - Sudbury MA, US
Joanna F. Au - Boston MA, US
Yu Chen - Milpitas CA, US
Nathan R. Kane - Arlington MA, US

Assignee:

E INK CORPORATION - Cambridge MA

International Classification:

H03K 3/00
G02B 26/00
H05K 7/00
G02B 1/10
H05K 13/00
B32B 37/06
B32B 37/10
B32B 37/12
B32B 37/14
B32B 38/00

US Classification:

327109, 359238, 361760, 427 58, 216 13, 156 60, 1563063, 156280

Abstract:

A backplane for use in an electro-optic display comprises a patterned metal foil having a plurality of apertures extending therethrough, coated on at least side with an insulating polymeric material and having a plurality of thin film electronic devices provided on the insulating polymeric material.

US Patent:

20140039824, Feb 6, 2014

Filed:

Apr 20, 2012

Appl. No.:

14/112154

Inventors:

Ling Zheng - Acton MA, US
Yu Chen - Andover MA, US

International Classification:

A61B 5/00

US Classification:

702106, 600509

Abstract:

A patient monitoring device and method that determines and monitors at least one patient parameter is provided. A configuration processor generates configuration information in response to a first input signal and an adaptive notch filter receives a second input signal. The second input signal includes a signal of interest and an interference signal in a predetermined frequency range. The adaptive notch filter automatically estimates the interference signal within the second input signal based on a filter parameter and removes the estimated interference signal from the second input signal to generate a target signal. A step processor is electrically coupled between the configuration processor and the adaptive notch filter and sets a value of the filter parameter based on the configuration information, wherein the adaptive notch filter uses the filter parameter to reduce a ringing artifact on the target signal below a threshold level.