Allen A Chang

US Patent:

7457092, Nov 25, 2008

Filed:

Dec 7, 2005

Appl. No.:

11/296753

Inventors:

Allen Chang - Fremont CA, US
Zhinan Wei - San Jose CA, US

Assignee:

Alpha & Omega Semiconductor, LLD.

International Classification:

H02H 3/02

US Classification:

361 939, 361 57

Abstract:

A circuit and method for controlling a MOSFET based switch that includes two back-to-back FET to block current flow in the OFF state irrespective of the polarity of the voltage differential across the switch. The MOSFET based switch further has a built-in current limit function by sensing the current flow through one of the two MOSFET switches. Furthermore, the bilateral current-limited switch further includes circuitry required for controlling both P type and N type FET in either common drain or common source configuration.

US Patent:

7728655, Jun 1, 2010

Filed:

Oct 10, 2008

Appl. No.:

12/249162

Inventors:

Kevin Ng - Fremont CA, US
Zhinan Wei - San Jose CA, US
Wai-Keung Peter Cheng - Union City CA, US
Allen Chang - Fremont CA, US

Assignee:

Alpha & Omega Semiconductor, Inc. - Sunnyvale CA

International Classification:

G05F 3/02

US Classification:

327543

Abstract:

A current limiting load switch for bridging supply Vss and load with a reference voltage VRdynamically generated by a VR-generator is proposed. It includes: A pair of power FET and sense FET interconnected in split-current configuration. The FET pair develops a load voltage while limiting load current Iload to a preset maximum Imax. The FET pair is sized to draw device currents Ipower and Is with RATIO=Is/Ipower

US Patent:

7750447, Jul 6, 2010

Filed:

Jun 11, 2007

Appl. No.:

11/761313

Inventors:

Allen Chang - Fremont CA, US
Wai-Keung Peter Cheng - Union City CA, US

Assignee:

Alpha & Omega Semiconductor, Ltd - Hamilton

International Classification:

H01L 23/495
H01L 23/48
G05F 1/00

US Classification:

257676, 257777, 323222

Abstract:

A high voltage and high power boost converter is disclosed. The boost converter includes a boost converter IC and a discrete Schottky diode, both of which are co-packaged on a standard single common die pad.

US Patent:

7825508, Nov 2, 2010

Filed:

Jul 31, 2007

Appl. No.:

11/830996

Inventors:

François Hébert - San Mateo CA, US
Allen Chang - Fremont CA, US

Assignee:

Alpha Omega Semiconductor, Inc. - Sunnyvale CA

International Classification:

H01L 23/34

US Classification:

257724, 257777, 257E23003

Abstract:

A DC-DC buck converter in multi-die package is proposed having an output inductor, a low-side Schottky diode and a high-side vertical MOSFET controlled by a power regulating controller (PRC). The multi-die package includes a first die pad with the Schottky diode placed there on side by side with the vertical MOSFET. The PRC die is attached atop the first die pad via an insulating die bond. Alternatively, the first die pad is grounded. The vertical MOSFET is a top drain N-channel FET, the substrate of Schottky diode die is its anode. The Schottky diode and the vertical MOSFET are stacked atop the first die pad. The PRC is attached atop the first die pad via a conductive die bond. The Schottky diode die can be supplied in a flip-chip configuration with cathode being its substrate. Alternatively, the Schottky diode is supplied with anode being its substrate without the flip-chip configuration.

US Patent:

7884454, Feb 8, 2011

Filed:

Sep 11, 2008

Appl. No.:

12/209106

Inventors:

Jun Lu - San Jose CA, US
Anup Bhalla - Santa Clara CA, US
Xiaobin Wang - San Jose CA, US
Allen Chang - Fremont CA, US
Man Sheng Hu - San Francisco CA, US
Xiaotian Zhang - San Jose CA, US

Assignee:

Alpha & Omega Semiconductor, Ltd - Hamilton

International Classification:

H01L 23/495

US Classification:

257676, 257666, 257686, 257780, 257781, 257E23031, 257E23039, 257E23059, 257E23079, 438123

Abstract:

A semiconductor package assembly may include a lead frame having a die bonding pad and plurality of leads coupled to the first die bonding pad. A vertical semiconductor device may be bonded to the die bonding pad. The device may have a conductive pad electrically connected to one lead through a first bond wire. An electrically isolated conductive trace may be formed from a layer of conductive material of the first semiconductor device. The conductive trace provides an electrically conductive path between the first bond wire and a second bond wire. The conductive path may either pass underneath a third bond wire thereby avoiding the third bond wire crossing another bond wire, or the conductive path may result in a reduced length for the first and second bond wires that is less than a predetermined maximum length.

US Patent:

7893778, Feb 22, 2011

Filed:

Jun 19, 2009

Appl. No.:

12/488413

Inventors:

Behzad Mohtashemi - Los Gatos CA, US
Allen Chang - Fremont CA, US

Assignee:

Alpha & Omega Semiconductor Incorporated - Sunnyvale CA

International Classification:

H03B 5/24
H03K 3/03

US Classification:

331 57, 331177 R

Abstract:

An oscillator includes a reference stage and multiple phase stages. The reference stage has a reference transistor having a gate coupled to a voltage reference and a drain coupled to a reference current source. Each phase stage includes a transistor, two current sources, a capacitor, switch, inverter, and latch. The transistor has a drain coupled to a first current source, a gate coupled to a node and a source coupled to the reference transistor's source. The capacitor and switch couple between the node and ground. The second current source couples to the node. The transistor's drain couples to the inverter's input. The inverter's output couples to the latch's set input. The latch's output couples to the switch. The inverter output also couples to the reset input of a subsequent phase stage's latch. The inverter output for a last stage couples to the reset input of a first stage latch.

US Patent:

7898092, Mar 1, 2011

Filed:

Nov 21, 2007

Appl. No.:

11/944313

Inventors:

Jun Lu - San Jose CA, US
Allen Chang - Fremont CA, US
Xiaotian Zhang - San Jose CA, US

Assignee:

Alpha & Omega Semiconductor, - Hamilton

International Classification:

H02H 9/00

US Classification:

257777, 257734, 257666, 257686, 257E23058, 257E25013

Abstract:

A stacked-die package for battery protection is disclosed. The battery protection package includes a power control integrated circuit (IC) stacked on top of integrated dual common-drain metal oxide semiconductor field effect transistors (MOSFETs) or two discrete MOSFETs. The power control IC is either stacked on top of one MOSFET or on top of and overlapping both two MOSFETs.

US Patent:

8008897, Aug 30, 2011

Filed:

Jun 11, 2007

Appl. No.:

11/761301

Inventors:

Allen Chang - Fremont CA, US
Wai-Keung Peter Cheng - Union City CA, US

Assignee:

Alpha & Omega Semiconductor, Ltd - Hamilton

International Classification:

G05F 1/10
H01L 25/04

US Classification:

323222, 257777

Abstract:

A boost converter for high power and high output voltage applications includes a low voltage controller integrated circuit and a high voltage, vertical, discrete field effect transistor, both of which are packed in a single package.