An Feng-I Chen - Fremont CA, US David Mun-Hien Choy - Los Altos CA, US Tawei Hu - San Jose CA, US Kenneth Carlin Nelson - Hollister CA, US Yuping Wang - San Jose CA, US Alan Tsu-I Yaung - San Jose CA, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F017/30
US Classification:
707 9
Abstract:
Access to system and user defined entities (objects, data items, or the like) is managed by a content manager. A privilege grants a user an ability to access system such controlled entities. An item is an atomic user data entity stored in the CM library server. A privileges table is used to store system and user defined privileges. A privilege is represented by a row in the table. Each privilege has a unique privilege code, with codes 0 to 999 reserved to store system-defined privileges and codes beyond 999 open for user-defined privileges thus allowing application specific privileges to be added without limit.
System And Method For Configurable Binding Of Access Control Lists In A Content Management System
An Feng-I Chen - Fremont CA, US Tawei Hu - San Jose CA, US Lily Liang - San Jose CA, US Edward Joseph Perry - Cary NC, US Yuping Wang - San Jose CA, US Alan Tsu-I Yaung - San Jose CA, US Howard Hao Zhang - San Jose CA, US
Assignee:
International Business Machines Corporation - Armonk NY
A system and method for authorizing access to a controlled entity by a user. A set of user privileges is provided for user; and a content manager intersects an access control list (ACL) and the set of user privileges to authorize access. Binding level control indicia selectively binds an access control list (ACL) to the controlled entity at item type, item, mixed, or library binding level. An item type comprises one or more component items with each component item having one or more item views which together form an item type view. A content manager is responsive to the binding level to perform ACL checking for authorizing access to the controlled entity by the user.
Resistive Memory Device With Improved Data Retention
An Chen - Sunnyvale CA, US Sameer Haddad - San Jose CA, US Tzu-Ning Fang - Palo Alto CA, US Yi-Ching Jean Wu - Sunnyvale CA, US Colin S. Bill - Cupertino CA, US
Assignee:
Spansion LLC - Sunnyvale CA
International Classification:
G11C 13/00
US Classification:
365151, 365148
Abstract:
In the present method of programming a memory device from an erased state, the memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrodes. In the programming method, (i) an electrical potential is applied across the first and second electrodes from higher to lower potential in one direction to reduce the resistance of the memory device, and (ii) an electrical potential is applied across the first and second electrodes from higher to lower potential in the other direction to further reduce the resistance of the memory device.
An Chen - Sunnyvale CA, US Sameer Haddad - San Jose CA, US
Assignee:
Spansion LLC - Sunnyvale CA
International Classification:
G11C 11/00 G11C 16/04 G11C 11/14 G11C 11/15
US Classification:
365148, 365158, 365163, 365171, 365173, 36518519
Abstract:
In an embodiment of a method of programming a resistive memory device, an electrical potential is applied to the gate of a transistor operatively associated with the resistive memory device, and successive, increasing electrical potentials are applied across the resistive memory device. In another embodiment of a method of programming a resistive memory device, an electrical potential is applied across the resistive memory device; and successive, increasing electrical potentials are applied to the gate of a transistor operatively associated with the resistive memory device.
Method Of Fabricating Metal-Insulator-Metal (Mim) Device With Stable Data Retention
Steven Avanzino - Cupertino CA, US Sameer Haddad - San Jose CA, US An Chen - Sunnyvale CA, US Yi-Ching Jean Wu - Sunnyvale CA, US Suzette K. Pangrle - Cupertino CA, US Jeffrey A. Shields - Sunnyvale CA, US
In the method of fabricating a metal-insulator-metal (MIM) device, a first electrode of α-Ta is provided. The Ta of the first electrode is oxidized to form a TaOlayer on the first electrode. A second electrode of β-Ta is provided on the TaOlayer. Such a device exhibits strong data retention, along with resistance to performance degradation under high temperatures.
Test Structures For Development Of Metal-Insulator-Metal (Mim) Devices
Steven Avanzino - Cupertino CA, US Suzette K. Pangrle - Cupertino CA, US Manuj Rathor - Milpitas CA, US An Chen - Sunnyvale CA, US Sameer Haddad - San Jose CA, US Nicholas Tripsas - San Jose CA, US Matthew Buynoski - Palo Alto CA, US
In the present electronic test structure comprising, a conductor is provided, overlying a substrate. An electronic device overlies a portion of the conductor and includes a first electrode connected to the conductor, a second electrode, and an insulating layer between the first and second electrodes. A portion of the conductor is exposed for access thereto.
Method Of Selecting Operating Characteristics Of A Resistive Memory Device
Tzu-Ning Fang - Palo Alto CA, US Swaroop Kaza - Santa Clara CA, US An Chen - Sunnyvale CA, US Sameer Haddad - San Jose CA, US
Assignee:
Spansion LLC - Sunnyvale CA
International Classification:
G11C 11/00
US Classification:
365148, 265163
Abstract:
In a method of providing an operating characteristic of a resistive memory device, material of an electrode thereof is selected to in turn provide a selected operating characteristic of the device. The material of the electrode may be reacted with material of an insulating layer of the resistive memory device to form a reaction layer, the selected operating characteristic being dependent on the presence of the reaction layer.
Programming In Memory Devices Using Source Bitline Voltage Bias
Zhizheng Liu - San Jose CA, US An Chen - Sunnyvale CA, US Wei Zheng - Santa Clara CA, US Kuo-Tung Chang - Saratoga CA, US Sung-Yong Chung - Santa Clara CA, US Gulzar Ahmed Kathawala - Santa Clara CA, US Ashot Melik-Martirosian - Sunnyvale CA, US
Assignee:
Spansion LLC - Sunnyvale CA
International Classification:
G11C 16/04
US Classification:
36518518, 36518515, 36518528
Abstract:
Systems and methods that facilitate improved programming memory cells in a nonvolatile memory (e. g. , flash memory) are presented. An optimized voltage component can facilitate supplying respective voltages to a source, drain, and gate associated with a memory cell during operations, such as programming operations. The optimized voltage component can facilitate supplying a predetermined source bitline voltage to a memory cell during programming of the cell to facilitate reducing leakage currents associated with the bitlines, which can improve programming of the memory cell, and to facilitate reducing the programming current, which can result in power efficient programming and improved programming speed.
Dr. Chen graduated from the Northeastern Ohio Universities College of Medicine in 1985. He works in Lexington, KY and specializes in Gastroenterology. Dr. Chen is affiliated with Saint Joseph Hospital East and Saint Joseph Hospital West.