Dai Van Tran

US Patent:

7557607, Jul 7, 2009

Filed:

May 14, 2007

Appl. No.:

11/803522

Inventors:

Dai D. Tran - Santa Clara CA, US
Jerry A. Case - San Jose CA, US

Assignee:

XILINX, Inc. - San Jose CA

International Classification:

H03K 19/177

US Classification:

326 39, 326 41

Abstract:

Reset of an interface device of an integrated circuit is described. A Peripheral Component Interconnect Express core is instantiated as an application specific circuit block in the integrated circuit. The core has a reset block configured to be in either a hierarchical reset mode or a hierarchical/separate reset mode. In the hierarchical reset mode, the reset block is configured to assert a reset signal selected of a plurality of reset signals and to automatically assert each and every other reset signal of the plurality of reset signals lower in a reset hierarchy than the reset signal selected.