Donald E Mills

US Patent:

40992349, Jul 4, 1978

Filed:

Nov 15, 1976

Appl. No.:

5/741632

Inventors:

John M. Woods - Glendale AZ
Marion G. Porter - Phoenix AZ
Donald V. Mills - Rosenberg TX
Edward F. Weller - Glendale AZ
Garvin Wesley Patterson - Glendale AZ
Earnest M. Monahan - Phoenix AZ

Assignee:

Honeywell Information Systems Inc. - Waltham MA

International Classification:

G06F 1516
G06F 1100

US Classification:

364200

Abstract:

An input/output system includes at least a pair of processing units and system interface apparatus for comparing the results produced by both halves of the pair during normal system operation under control of a main or host processing unit. The system interface apparatus includes comparison circuits for detecting a mis-compare between the results of each half and sequence control logic circuits which are conditioned upon the occurrence of a mis-compare to unlock or deconfigure the pair to establish in a predetermined manner which of the processing units is faulty. The system interface apparatus, following signal indications of a certain minimum confidence within a processing unit, continues testing of the processor using stored diagnostic routines to determine which one of the processing units is good. It then stops the operation of the bad processing unit and enables system operation to be continued with the good processing unit. To ensure reliable processing, both halves of the pair are tested when a miscompare cannot be related to an error condition associated with one of the pair notwithstanding the fact that the first processing unit tests well.