James D Parsons

US Patent:

20040015064, Jan 22, 2004

Filed:

Jun 17, 2003

Appl. No.:

10/464427

Inventors:

James Parsons - Redondo Beach CA, US

International Classification:

A61B005/05

US Classification:

600/347000

Abstract:

A blood sampling device and method of use, which reduce or eliminate the pain and discomfort typically associated with blood sample collection, are disclosed. The device enables a user to easily and painlessly withdraw a blood sample and simultaneously load the sample portion of a blood chemistry test strip. In addition, the related methods of use minimize the number of steps and reduce the overall time for extracting a blood sample from a user of the device

US Patent:

47389370, Apr 19, 1988

Filed:

Oct 22, 1985

Appl. No.:

6/789983

Inventors:

James D. Parsons - Newbury Park CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

H01L 2128

US Classification:

437180

Abstract:

An ohmic contact structure and method of forming the same are described which yield a true non-rectifying Schottky junction between a metallic material and a semiconductor material. The two materials are selected so that they satisfy the theoretical requirements for an ideal Schottky junction, with the work function of the metallic material less than that of an n-type semiconductor material and greater than that of a p-type simiconductor material. One of the materials is deposited upon the other by means of an epitaxial process, with the two materials being selected such that the difference in their lattice parameters is less than about 10%, and preferably less than about 5%. This process reduces or entirely eliminates the previous requirement for doping the contact region, and also eliminates a heat cycle that has previously been necessary to fabricate a non-rectifying junction.

US Patent:

50100351, Apr 23, 1991

Filed:

May 13, 1988

Appl. No.:

7/197582

Inventors:

Rointan F. Bunshah - Playa Del Rey CA
James D. Parsons - Newbury Park CA
Oscar M. Stafsudd - Los Angeles CA

Assignee:

The Regents of the University of California - Berkeley CA

International Classification:

H01L 2120

US Classification:

437100

Abstract:

A semiconductor device wafer base wherein devices may be fabricated in silicon carbide, the base having a compatible substrate and a beta silicon carbide overlay layer epitaxially related to the substrate, the beta silicon carbide layer being unpolytyped, single crystal, uncracked, without twins, and having integrated circuit quality surface morphology. Preferably, the substrate is a single crystal of titanium carbide, which is the same cubic lattice-type as beta silicon carbide with a lattice parameter different from that of beta silicon carbide by less than about 1%. Additionally, the thermal expansion coefficients of beta silicon carbide and titanium carbide are nearly the same, minimizing the creation of thermal stresses during cooling and heating. The beta silicon carbide is useful in fabricating semi-conductor devices for use at much higher temperatures than is silicon, and for use at high power levels, at high frequencies, and in radiation hardened applications. The device base may be fabricated by any suitable technique, including reactive deposition and chemical vapor deposition.

US Patent:

47359188, Apr 5, 1988

Filed:

Jan 12, 1987

Appl. No.:

7/002581

Inventors:

James D. Parsons - Newbury Park CA
David E. Snyder - Seattle WA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

H01L 2120

US Classification:

437 90

Abstract:

A semiconductor device component, and process for preparation thereof, wherein current flowing in a vertical channel of semiconductor material is controlled by metallic gates laterally disposed on either side of the channel. Insulator layers are positioned overlying and underlying each gate, to reduce parasitic capacitance which would otherwise be present if the metallic gate material were in contact with overlying and underlying semiconductor material. Reduction of the capacitance allows the use of wider gate strips, thereby reducing the series resistance to an external gate contact. These changes significantly improve the high-power, high-frequency performance of the device component, as compared with permeable base transistors.

US Patent:

46774513, Jun 30, 1987

Filed:

May 24, 1985

Appl. No.:

6/737613

Inventors:

James D. Parsons - Newbury Park CA
David E. Snyder - Seattle WA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

H01L 2980

US Classification:

357 22

Abstract:

A semiconductor device component, and process for preparation thereof, wherein current flowing in a vertical channel of semiconductor material is controlled by metallic gates laterally disposed on either side of the channel. Insulator layers are positioned overlying and underlying each gate, to reduce parasitic capacitance which would otherwise be present if the metallic gate material were in contact with overlying and underlying semiconductor material. Reduction of the capacitance allows the use of wider gate strips, thereby reducing the series resistance to an external gate contact. These changes significantly improve the high-power, high-frequency performance of the device component, as compared with permeable base transistors.

US Patent:

48289388, May 9, 1989

Filed:

Apr 11, 1986

Appl. No.:

6/851004

Inventors:

Lawrence S. Lichtmann - Redondo Beach CA
James D. Parsons - Newbury Park CA

Assignee:

Hughes Aircraft Company - Los Angeles CA

International Classification:

B32B 900
C23C 1630

US Classification:

428689

Abstract:

A method for chemical vapor deposition of materials containing tellurium, such as cadmium telluride and mercury cadmium telluride, wherein the reactant source of the tellurium is a tellurophene or methyltellurol. These reactant sources have high vapor pressures, and the reactant source vapors emitted from the reactant sources have decomposition temperatures of less than about 300. degree. C. , so that deposition may be accomplished at low temperatures of about 250. degree. C. The reactant source vapor containing tellurium is mixed with a reactant source vapor containing another substance to be codeposited, such as dimethylcadmium or dimethylmercury, and contacted with a substrate maintained at the deposition temperature, the deposition being preferably accomplished in an inverted vertical chemical vapor deposition reactor.

US Patent:

47676663, Aug 30, 1988

Filed:

May 23, 1985

Appl. No.:

6/737367

Inventors:

Rointan F. Bunshah - Playa Del Rey CA
James D. Parsons - Newbury Park CA
Oscar M. Stafsudd - Los Angeles CA

Assignee:

The Regents of the University of California - Berkeley CA

International Classification:

B32B 702
B32B 1504

US Classification:

428334

Abstract:

A semiconductor device wafer base wherein devices may be fabricated in silicon carbide, the base having a compatible substrate and a beta silicon carbide overlay layer epitaxially related to the substrate, the beta silicon carbide layer being unpolytyped, single crystal, uncracked, without twins, and having integrated circuit quality surface morphology. Preferably, the substrate is a single crystal of titanium carbide, which is the same cubic lattice-type as beta silicon carbide with a lattice parameter different from that of beta silicon carbide by less than about 1%. Additionally, the thermal expansion coefficients of beta silicon carbide and titanium carbide are nearly the same, minimizing the creation of thermal stresses during cooling and heating. The beta silicon carbide is useful in fabricating semiconductor devices for use at much higher temperatures than is silicon, and for use at high power levels, at high frequencies, and in radiation hardened applications. The device base may be fabricated by any suitable technique, including reactive deposition and chemical vapor deposition.

US Patent:

42524083, Feb 24, 1981

Filed:

Mar 9, 1979

Appl. No.:

6/019129

Inventors:

James D. Parsons - Los Angeles CA
Alfred S. Yue - Los Angeles CA

Assignee:

The Regents of the University of California - Berkeley CA

International Classification:

G02B 516
C04B 3500
C03C 2320

US Classification:

350 9633

Abstract:

A directionally solidified, optically conductive eutectic system and method of forming the same. A Type II eutectic which divides into fiber and matrix phases when directionally solidified consists of a fiber phase having a lesser molecular weight but higher refractive index than the matrix phase. The resulting fiber array is optically conductive, and may be used to advantage in applications such as CRT screens, waveguides, fiber optic image intensifiers, and lasers.