Jason D Kim

US Patent:

53863364, Jan 31, 1995

Filed:

Jun 19, 1992

Appl. No.:

7/901469

Inventors:

Jason S.-M. Kim - Los Angeles CA
James M. Anderson - Huntington Beach CA

Assignee:

TRW Inc. - Redondo Beach CA

International Classification:

H03K 1712

US Classification:

361 93

Abstract:

A current limiting circuit and technique is provided for preventing excessive current supplied to a circuit and for providing self-recovery characteristics thereto. The current limiting circuit includes an input for receiving a supply voltage for supplying power to the monitored circuit and an output for providing the power to the desired circuit being monitored. The circuit employs a drive transistor having a source connected to the input and a drain connected to the output. The drive transistor further includes a gate for receiving a control signal. A current mirror circuit is provided for sensing a current overload and adjusting the control signal to indicate the amount of current drawn. During normal current draw, the circuit provides the supply voltage as the output. When excessive current draw is detected, the drive transistor is turned off and the output current is thereby cut off.

US Patent:

58925031, Apr 6, 1999

Filed:

May 28, 1997

Appl. No.:

8/863640

Inventors:

Jason Seung-Min Kim - Cerritos CA

Assignee:

AST Research, Inc. - Irvine CA

International Classification:

G09G 500

US Classification:

345168

Abstract:

A multimedia console keyboard provides a convenient user interface to provide multimedia functions easily accessible to the user. In general, the multimedia console keyboard provides speakers, microphones, volume control, brightness control, contrast control, a pointing device, an electronic keyboard template with contact sensitive ICON and a real time clock/calendar alarm and computer power control switch at the keyboard. The multimedia console keyboard provides an integrated analog-digital preprocessor with audio compression and expansion capabilities and other analog capabilities. Integrated audio allows for a closed-loop voice activation and control for the computer.

US Patent:

55265030, Jun 11, 1996

Filed:

Oct 6, 1993

Appl. No.:

8/132643

Inventors:

Jason S. Kim - Los Angeles CA

Assignee:

AST Research, Inc. - Irvine CA

International Classification:

G06F 1202

US Classification:

395413

Abstract:

A virtual addressing buffer circuit has improved address mapping and control flexibility for improved physical resource management and a unique opportunity for forward-compatible system design. The virtual addressing buffer formats the output address utilizing a format register as a combination of the new address bits and the original input address bits. The ability to format the output address enables the user to replace certain address bits without requiring that the entire address be replaced. The virtual addressing buffer controls the output of several command signals to external circuits to indicate how the system should respond to the address output from the virtual addressing buffer. The command signals are controlled by a command register and are output from the virtual addressing buffer only when an address match has been verified. The virtual addressing buffer circuit filters out certain bits of an input address as indicated by a filter register before it verifies that the input address matches a stored address.

US Patent:

57784469, Jul 7, 1998

Filed:

May 2, 1997

Appl. No.:

8/848774

Inventors:

Jason Seung-Min Kim - Cerritos CA

Assignee:

AST Research, Inc. - Irvine CA

International Classification:

G06F 1200

US Classification:

711167

Abstract:

A rule-based DRAM controller asserts memory access and control signals (including the CAS, RAS, WE, and address data signals) based upon pre-specified control rules. Certain pre-specified rules, or conditions, are used by the DRAM controller to determine the timing and sequence of the memory accessing and control signals output by the DRAM controller. The control rules for asserting the various memory accessing signals are advantageously implemented as logic within the DRAM controller, while the conditions and qualification for the control rules are provided from various monitoring signals and independently operating timing modules which keep track of the DRAM and controller states. Based upon these rules and conditions, the request inputs to the DRAM controller are interpreted to provide optimum access speed to the DRAM.

US Patent:

58095594, Sep 15, 1998

Filed:

Jul 17, 1997

Appl. No.:

8/895737

Inventors:

Jason Seung-Min Kim - Los Angeles CA

Assignee:

AST Research, Inc. - Irvine CA

International Classification:

G06F 1210
G06F 9455

US Classification:

711202

Abstract:

A method and apparatus using a virtual addressing buffer circuit afford address mapping and control flexibility to provide a unique opportunity for device emulation and software debugging. The method permits the emulation of a device which is physically not present in a CPU controlled system utilizing a virtual addressing buffer circuit. The method includes the step of storing a match address which corresponds to an address location of the device. The virtual addressing buffer intercepts an address request from a CPU for the address location of the device. Bits of the requested address which are not relevant to a determination of whether the requested address matches the match address are filtered out to produce a filtered request address. The filtered request address is compared with the match address, and a match indicator is activated when the filtered requested address matches the match address. A terminate command is provided to a bus controller connected to the CPU and a local memory when the match indicator is active.

US Patent:

51810298, Jan 19, 1993

Filed:

May 13, 1991

Appl. No.:

7/699506

Inventors:

Jason S. Kim - Los Angeles CA

Assignee:

AST Research, Inc. - Irvine CA

International Classification:

G09G 300

US Classification:

241 20

Abstract:

An electronic keyboard template for use with software applications programs is responsive to command signals transmitted by designated function keys on a computer keyboard. The template includes an LCD display screen for displaying icons representative of operations performed by the function keys, control circuitry, and driving circuitry for generating the display of the icons on the LCD screen. In a preferred embodiment, the control circuitry includes a microprocesor, a Random-Access-Memory, and a digital Look-Up-Table, and the driving circuitry comprises a matrix driver and a refresh sequencer. The driving circuitry may further include a DC-to-DC convertor, and a plurality of shift registers for energizing pixel locations designated within a grid system on the LCD screen. In an alternative embodiment, the control circuitry may be external to the template (e. g. , within the keyboard).

US Patent:

57377693, Apr 7, 1998

Filed:

Jan 24, 1997

Appl. No.:

8/788938

Inventors:

Jason Seung-Min Kim - Los Angeles CA

Assignee:

AST Research, Inc. - Irvine CA

International Classification:

G06F 1202

US Classification:

711202

Abstract:

A virtual addressing buffer circuit has improved address mapping and control flexibility for improved physical resource management and a unique opportunity for forward-compatible system design. The virtual addressing buffer formats the output address utilizing a format register as a combination of the new address bits and the original input address bits. The ability to format the output address enables the user to replace certain address bits without requiring that the entire address be replaced. The virtual addressing buffer controls the output of several command signals to external circuits to indicate how the system should respond to the address output from the virtual addressing buffer. The command signals are controlled by a command register and are output from the virtual addressing buffer only when an address match has been verified. The virtual addressing buffer circuit filters out certain bits of an input address as indicated by a filter register before it verifies that the input address matches a stored address.

US Patent:

20160098677, Apr 7, 2016

Filed:

Dec 10, 2015

Appl. No.:

14/965809

Inventors:

Jong Myoung KIM - Yorba Linda CA, US
Jason KIM - Yorba Linda CA, US

International Classification:

G06Q 10/08

Abstract:

A shipment coordination service, which may be a company or a business, coordinates shipment of a package between an origin and a destination using one or more carriers. The shipment coordination service may have one or more processing centers associated with it for processing packages. The shipment coordination service can use an origin carrier to deliver the package from an origin to an origin processing center, and a destination carrier can deliver the package from a destination processing center or another intermediate location to the destination. The shipment coordination service may also use an intermediate carrier to deliver the package from one processing center to another processing center or to another intermediate location.