Jorge Edgar Rios

US Patent:

52569128, Oct 26, 1993

Filed:

Dec 19, 1991

Appl. No.:

7/812070

Inventors:

Jorge C. Rios - San Jose CA

Assignee:

Sun Microsystems, Inc. - Mountain View CA

International Classification:

H03K 513
H03K 301
H04L 700

US Classification:

307269

Abstract:

The present invention, a synchronizer, utlizes a plurality of clocking signals generated by a specialized clocking circuit, in conjunction with synchronizer modules incorporating transparent latches, to synchronize signals passing from a first clock domain to a second clock domain. Two types of synchronizer modules are disclosed, a single synchronizer module and a multiple synchronizer module. Both types of synchronizer modules utilize a "basic synchronizer cell" comprised of two transparent latches in series. The single synchronizer module is comprised of two such basic synchronizer cells, and utilizes a plurality of clocking signals which are coupled to the transparent latches to accomplish synchronization. The multiple synchronizer module, also utilizes a plurality of clocking signals, and is comprised of a plurality of single synchronizer modules coupled in parallel and a synchronizer selector circuit. The multiple synchronizer module operates by initially coupling the signal to be synchronized to the synchronizer selector circuit, which then sequentially couples the signal to successive single synchronizer modules.

Address:

5088 Cribari Blfs, San Jose, CA 95135

VIN:

4YDT23K247B452679

Make:

BMW

Model:

X5-Series AWD 4dr 4.8i

Year:

2007