Joseph P Weigel

US Patent:

53393970, Aug 16, 1994

Filed:

Oct 12, 1990

Appl. No.:

7/596812

Inventors:

Richard G. Eikill - Rochester MN
Sheldon B. Levenstein - Rochester MN
Lynn A. McMahon - Rochester MN
Joseph P. Weigel - Oronoco MN

Assignee:

International Business Machines Corporation - Armonk NY

International Classification:

G06F 1210
G06F 1214
G06F 1300
G06F 13376

US Classification:

395400

Abstract:

An information processing network includes multiple processing devices, a main storage memory, one or more disk drives or other auxiliary storage devices, and an interface for coupling the processing devices to the main storage memory and the auxiliary devices. A primary directory in main storage contains mapping information for translating virtual addresses to real addresses in main storage. Look-aside buffers in the processing devices duplicate some of the mapping information. A primary directory hardware lock, subject to exclusive control by any one of the processing devices to update the primary directory, inhibits access to the primary directory based on hardware address translations initiated when one of the processors holds the primary directory lock. Address translations in progress when the lock is acquired proceed to completion before the primary directory is updated under the lock. Accordingly, such updates proceed atomically relative to hardware primary directory searches.