Paul S Chang

US Patent:

6615864, Sep 9, 2003

Filed:

Jan 29, 2002

Appl. No.:

10/058199

Inventors:

Paul C. Chang - Tustin CA 92782

International Classification:

E04H 416

US Classification:

137521, 13762414, 137518, 15 17

Abstract:

A pool cleaner reed valve for a pulsating submersible swimming pool cleaner which has a valve body ( ) configured to fit into a pulsating valve enclosure. The body includes a rectangular inlet end ( ) and an round outlet end ( ) with a pair of fulcrum points ( ) and restricting boundaries ( ) for retaining and confining valve movements. A pair of opposed rigid valve plates ( ) are angularly juxtaposed within the valve inlet end contiguously engaging the fulcrum points and respective restricting boundaries such that each opposed blade rotates inwardly on the fulcrum point until the distal ends intimately engage as influenced by negative fluid pressure applied by a pool pump. A pair of torsion springs ( ) surround each restricting boundary and interface with each valve plate returning them to a parallel position when fluid pressure is terminated. A resilient sleeve ( ) is positioned on each spring for eliminating a metal to metal contact with the spring to the valve plate.

US Patent:

6743703, Jun 1, 2004

Filed:

Sep 9, 2002

Appl. No.:

10/238104

Inventors:

Vladimir Rodov - Redondo Beach CA
Paul Chang - Saratoga CA
Jianren Bao - Fullerton CA
Wayne Y. W. Hsueh - San Jose CA
Arthur Ching-Lang Chiang - Saratoga CA
Geeng-Chuan Chern - Cupertino CA

Assignee:

APD Semiconductor, Inc. - San Jose CA

International Classification:

H01L 2974

US Classification:

438527, 257341, 257495, 257653, 257401, 257133, 257155, 257355

Abstract:

A two-terminal power diode has improved reverse bias breakdown voltage and on resistance includes a semiconductor body having two opposing surfaces and a superjunction structure therebetween, the superjunction structure including a plurality of alternating P and N doped regions aligned generally perpendicular to the two surfaces. The P and N doped regions can be parallel stripes or a mesh with each region being surrounded by doped material of opposite conductivity type. A diode junction associated with one surface can be an anode region with a gate controlled channel region connecting the anode region to the superjunction structure. Alternatively, the diode junction can comprise a metal forming a Schottky junction with the one surface. The superjunction structure is within the cathode and spaced from the anode. The spacing can be varied during device fabrication.

US Patent:

6979861, Dec 27, 2005

Filed:

May 30, 2002

Appl. No.:

10/159558

Inventors:

Vladimir Rodov - Redondo Beach CA, US
Paul Chang - Saratoga CA, US
Gary M. Hurtz - Pleasanton CA, US
Geeng-Chuan Chern - Cupertino CA, US
Jianren Bao - Fullerton CA, US

Assignee:

APD Semiconductor, Inc. - San Jose CA

International Classification:

H01L029/76
H01L029/94
H01L031/062
H01L031/113
H01L031/119

US Classification:

257329, 257471, 438212

Abstract:

A power device having vertical current flow through a semiconductor body of one conductivity type from a top electrode to a bottom electrode includes at least one gate electrode overlying a gate insulator on a first surface of the body, a channel region of second conductivity type in the surface of the body underlying all of the gate electrode, a first doped region of the second conductivity type contiguous with the channel region and positioned deeper in the body than the channel region and under a peripheral region of the gate electrode, and a second doped source/drain region in the surface of the body abutting the channel region and adjacent to the gate electrode. When the gate is forward biased, an inversion region extends through the channel region and electrically connects the first electrode and the second electrode with a small Vnear to the area between adjacent P bodies being flooded with electrons and denuded of holes. Therefore, at any forward bias this area conducts as an N-type region. When the gate electrode is reverse biased, the long channel region underlying the full length of the gate electrode reduces reverse leakage current.

US Patent:

7434285, Oct 14, 2008

Filed:

Mar 1, 2008

Appl. No.:

12/074023

Inventors:

Paul C. Chang - Tustin CA, US

International Classification:

E04H 4/16

US Classification:

15 17

Abstract:

An adjustable pulsating submersible () is taught consisting of, a lower pool sweep body () with a resilient skirt () attached underneath. An integrated valve () is positioned within the lower pool sweep body and is used to accomplish a preliminary pre-selected flow adjustment. An upper pool sweep body () is placed over the integrated valve and is attached to the lower pool sweep body with threads in no more than one quarter turn. A flow adjuster () is slid tightly into upper pool sweep body and includes a number of first flow openings (). A flow gate () is slid onto the flow adjuster and may rotate within limits with the flow adjuster. The flow gate incorporates a number of second flow openings () aligned with the first flow openings, when the flow adjuster is manually rotated the second flow openings misalign with the first flow openings providing precise adjustable flow operation.

US Patent:

8077439, Dec 13, 2011

Filed:

Nov 5, 2008

Appl. No.:

12/265601

Inventors:

Hooman Darabi - Irvine CA, US
Ming Wang Sze - Irvine CA, US
Kent Oertle - Phoenix AZ, US
Paul Chang - Ladera Ranch CA, US

Assignee:

Broadcom Corporation - Irvine CA

International Classification:

H02H 9/00

US Classification:

361 56, 361220, 361781, 361799

Abstract:

Aspects of a method and system for mitigating risk of electrostatic discharge in a system on chip are provided. In this regard, for an IC comprising a plurality of portions electrically isolated from one another within the IC, ESD current may be routed via one or more paths within and/or on a package to which the IC is bonded. The one or more paths may electrically couple two or more of the portions of the IC. The one or more paths may have low impedance at DC and high impedance at one or more frequencies utilized in the integrated circuit. One of the portions of the IC may be a ground plane for RF circuitry. One of the portions of the IC may be a ground plane for digital circuitry. The one or more paths may be fabricated in one or more metal layers of said package.

US Patent:

20020019115, Feb 14, 2002

Filed:

Sep 7, 2001

Appl. No.:

09/949248

Inventors:

Vladimir Rodov - Redondo Beach CA, US
Wayne Hsueh - San Jose CA, US
Paul Chang - Saratoga CA, US
Michael Chern - Cupertino CA, US

International Classification:

H01L021/326

US Classification:

438/467000

Abstract:

A power rectifier having low on resistance, mass recovery times and low forward voltage drop. In a preferred embodiment, the present invention provides a power rectifier device employing a vertical device structure, i.e., with current flow between the major surfaces of the discrete device. The device employs a large number of parallel connected cells, each comprising a MOSFET structure with a gate to drain short via a common metallization. This provides a low Vpath through the channel regions of the MOSFET cells to the source region on the other side of the integrated circuit. A thin gate structure is formed annularly around the pedestal regions on the upper surface of the device and a precisely controlled body implant defines the channel region and allows controllable device characteristics, including gate threshold voltage and V. A parallel Schottky diode is also provided which increases the switching speed of the MOSFET cells. The present invention further provides a method for manufacturing a rectifier device which provides highly repeatable device characteristics and which can provide such devices at reduced cost. The active channel regions of the device are defined using pedestals in a double spacer, double implant self-aligned process. The channel dimensions and doping characteristics may be precisely controlled despite inevitable process variations in spacer sidewall formation. Only two masking steps are required, reducing processing costs.

US Patent:

6331455, Dec 18, 2001

Filed:

Apr 1, 1999

Appl. No.:

9/283537

Inventors:

Vladimir Rodov - Redondo Beach CA
Wayne Y. W. Hsueh - San Jose CA
Paul Chang - Saratoga CA
Michael Chern - Cupertino CA

Assignee:

Advanced Power Devices, Inc. - San Jose CA

International Classification:

H01L 21332

US Classification:

438138

Abstract:

A power rectifier having low on resistance, mass recovery times and low forward voltage drop. In a preferred embodiment, the present invention provides a power rectifier device employing a vertical device structure, i. e. , with current flow between the major surfaces of the discrete device. The device employs a large number of parallel connected cells, each comprising a MOSFET structure with a gate to drain short via a common metallization. This provides a low V. sub. f path through the channel regions of the MOSFET cells to the source region on the other side of the integrated circuit. A thin gate structure is formed annularly around the pedestal regions on the upper surface of the device and a precisely controlled body implant defines the channel region and allows controllable device characteristics, including gate threshold voltage and V. sub. f. A parallel Schottky diode is also provided which increases the switching speed of the MOSFET cells. The present invention further provides a method for manufacturing a rectifier device which provides highly repeatable device characteristics and which can provide such devices at reduced cost.

US Patent:

56552467, Aug 12, 1997

Filed:

Apr 22, 1996

Appl. No.:

8/635596

Inventors:

Paul C. Chang - Placentia CA

International Classification:

E04H 416

US Classification:

15 17

Abstract:

A pulsating submergible pool cleaner which has a hollow body (24) connected to a pool pump through a flexible hose. An integrated reed valve (42) and relief valve (44) receive the full flow of water from the pump, with the reed valve closing, forcing the relief valve open generating hydraulic cyclic pulsations. An inlet mounting foot (74) is attached to the hollow body and a flexible circular debris removing disc (80) is removably connected to the foot. The foot and disc engage the submerged surface by the suction of the pool pump, and the cleaner is propelled around the pool surfaces by the cyclic pulsation generated by the integrated valves. Debris is removed and ingested into the cleaner by the scrubbing action of the disc, combined with high velocity water flow entering the body under the disc through small passageways. A leaf catching net (96) may be added as an accessory for collecting large debris, such as leaves of plants.