Andrew E Gruber

US Patent:

6473086, Oct 29, 2002

Filed:

Dec 9, 1999

Appl. No.:

09/457649

Inventors:

Stephen L. Morein - Cambridge MA
Andrew E. Gruber - Arlington MA

Assignee:

ATI International Srl - Barbados

International Classification:

G06F 1580

US Classification:

345505, 345422, 345537, 345549, 710 22

Abstract:

A method and apparatus for graphics processing that utilizes multiple graphics processors in parallel is presented. A primary graphics processor is operably coupled to a primary memory that includes a primary color buffer and a primary Z buffer. The primary processor processes a first portion of the image data for a frame, where processing the first portion stores color data in the primary color buffer and Z data in the primary Z buffer. A secondary processor is operably coupled to a secondary memory that includes a secondary color buffer and a secondary Z buffer. The secondary processor processes a second portion of the image data for the frame. The processing of the second portion of the image data results in color data being stored in the secondary color buffer and Z data being stored in the secondary Z buffer. The display signal that results in the image data for the frame being displayed is generated by a display driver included in the primary processor. In one embodiment, the display driver retrieves all of the color data used to generate the display signal from the primary color buffer.

US Patent:

6483505, Nov 19, 2002

Filed:

Mar 17, 2000

Appl. No.:

09/527752

Inventors:

Stephen L. Morein - Cambridge MA
Mark C. Fowler - Hopkinton MA
Andrew E. Gruber - Arlington MA

Assignee:

ATI International SRL - Barbados

International Classification:

G06T 1500

US Classification:

345419

Abstract:

A method and apparatus for multipass pixel processing is presented. A command stream that includes a plurality of drawing commands is received where multipass drawing commands included in the stream include a number of sets of state information and one or more graphics primitives. For a multipass pixel processing operation, the graphics pipeline that performs the pixel processing is first configured using a first set of state information included in the sets of state information for the multipass operation. Once the graphics pipeline has been configured, at least a portion of the processing to be performed for the drawing command is performed using the graphics pipeline as configured by this first set of state information. The resultant data produced through this processing is stored as intermediate data. This may be referred to as the first pass in the multipass operation.

US Patent:

6486884, Nov 26, 2002

Filed:

May 19, 1999

Appl. No.:

09/314561

Inventors:

Milivoje Aleksic - Richmond Hill, CA
Andrew E. Gruber - Arlington MA
Brad Holister - Newtown MA
Carl K. Mizuyabu - Thornhill, CA

Assignee:

ATI International SRL - Barbados

International Classification:

G06F 1206

US Classification:

345571, 345543, 711101, 711105

Abstract:

A method and apparatus for storing sequential data words associated with a block of data in a non-linear manner within the data block is taught such that any row or column associated with the data block may be accessed using a burst access. A row, or column of data accessed by a burst frees up instruction bandwidth of a video controller. In particular, it is assured that each row and column of data associated with the data block has at least one sequential pair of data words associated with it. By assuring at least one sequential pair of data words, it is possible to issue a burst request for a minimum of two words of data with each row access, or column access of the video controller.

US Patent:

6504549, Jan 7, 2003

Filed:

May 19, 1999

Appl. No.:

09/314208

Inventors:

Brad Holister - Newtown MA
Andrew E. Gruber - Arlington MA
Carl K. Mizuyabu - Thornhill, CA

Assignee:

ATI International Srl

International Classification:

G06F 1318

US Classification:

345535, 345545, 345520

Abstract:

A method and apparatus dealing with optimizing the arbitration between clients requesting data. In particular, a set of rules determining which client request will provide an optimized subsequent memory access is implemented. The highest rule recognizes a client in urgent need of data, generally because it has not been services by the arbiter. The next highest-ranking rules would recognize data accesses of the same operation, such as read or write, and to the same page of memory, or requests to a different bank of memory. The next highest ranking rules would be for data accesses on the same page currently being accessed, but for a different operation, and for a different operation and to a different bank. Finally, any other client requests to a different page on the same bank/ would have the lowest priority. Such a request optimizes bandwidth of the memory bus.

US Patent:

6542159, Apr 1, 2003

Filed:

May 19, 1999

Appl. No.:

09/314209

Inventors:

Carl Mizuyabu - Thornhill, CA
Milivoje Aleksic - Richmond Hill, CA
Andrew Gruber - Arlington MA

Assignee:

ATI International S.r.l. - Christchurch

International Classification:

G09G 539

US Classification:

345531, 345535, 345570

Abstract:

A method and apparatus for dynamic issuing of memory access instructions. In particular, a specific data access request that is about to be sent to a memory, such as a frame buffer, is dynamically chosen based upon pending requests within a pipeline. It is possible to optimize video data requests by dynamically selecting a memory access request at the time the request is made to the memory. In particular, if it is recognized that the memory about to be accessed will no longer be needed by subsequent memory requests, the request can be changed from a normal access request to an access request with an auto-close option. By using an auto close option, the memory bank being accessed is closed after the access, without issuing a separate memory close instruction.

US Patent:

6633296, Oct 14, 2003

Filed:

May 26, 2000

Appl. No.:

09/579432

Inventors:

Indra Laksono - Richmond Hill, CA
Milivoje Aleksic - Richmond Hill, CA
Antonio Asaro - Scarborough, CA
Andrew E. Gruber - Arlington MA
Gordon Caruk - Bramalea, CA
Brian Lee - Etobicoke, CA

Assignee:

ATI International SRL - Barbados

International Classification:

G06F 1516

US Classification:

345502, 345531, 345519, 345520, 710305

Abstract:

In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.

US Patent:

6658531, Dec 2, 2003

Filed:

Jul 12, 2000

Appl. No.:

09/614931

Inventors:

Milivoje Aleksic - Richmond Hill, CA
James Yee - Willowdale, CA
Hon Ming Cheng - Scarborough, CA
John DeRoo - Hopkinton MA
Andrew E. Gruber - Arlington MA

Assignee:

ATI International SRL - Christchurch

International Classification:

G06F 1200

US Classification:

711129, 711130, 711150, 711152, 711163, 345533, 345542, 345544, 345549, 345557

Abstract:

A method and apparatus for utilizing a data cache in a system with both 2D and 3D graphics applications. In a specific embodiment of the present invention, a mode signal is received by the video system indicating whether a 2D or 3D application is to be used. Depending on the mode signal, either as a unified cache capable of being accessed by two separate data access streams, or two independent caches, each accessed by one data access stream.

US Patent:

6662257, Dec 9, 2003

Filed:

May 26, 2000

Appl. No.:

09/579202

Inventors:

Gordon Caruk - Bramalea, CA
Indra Laksono - Richmond Hill, CA
Antonio Asaro - Scarborough, CA
Andrew E. Gruber - Arlington MA
Milivoje Aleksic - Richmond, CA
Brian Lee - Etobicoke, CA

Assignee:

ATI International Srl - Barbados

International Classification:

G06F 1314

US Classification:

710305, 710 20

Abstract:

In a specific embodiment, a system for providing video is disclosed, the system having a system bus, which in one embodiment is an Advanced Graphics Port (AGP) bus. The system bus is connected to a data bridge, which is connected to a second and third AGP bus. Each of the AGP busses are connected to graphics processors. The bridge routes data requests from one graphics processor to the second graphics processor without accessing the system AGP bus based upon a memory mapping information stored in a routing table or a register set. In another aspect of the present invention, the bridge responds to initialization requests using attributes that may vary depending on the specific mode of operation. Another aspect of the present invention allows for conversion between various AGP protocol portions.