Andrew C Gruber

US Patent:

8473721, Jun 25, 2013

Filed:

Apr 16, 2010

Appl. No.:

12/762020

Inventors:

Michael J. Mantor - Orlando FL, US
Jeffrey T. Brady - Orlando FL, US
Christopher L. Spencer - Oviedo FL, US
Daniel W. Wong - Cupertino CA, US
Andrew E. Gruber - Arlington MA, US

Assignee:

Advanced Micro Devices, Inc. - Sunnyvale CA
ATI Technologies ULC - Markham, Ontario

International Classification:

G06F 9/30

US Classification:

712221, 712300

Abstract:

Disclosed herein is a processing unit configured to process video data, and applications thereof. In an embodiment, the processing unit includes a buffer and an execution unit. The buffer is configured to store a data word, wherein the data word comprises a plurality of bytes of video data. The execution unit is configured to execute a single instruction to (i) shift bytes of video data contained in the data word to align a desired byte of video data and (ii) process the desired byte of the video data to provide processed video data.

US Patent:

20180040095, Feb 8, 2018

Filed:

Aug 2, 2016

Appl. No.:

15/226627

Inventors:

- San Diego CA, US
Christopher Paul Frascati - Oviedo FL, US
Jonnala Gadda Nagendra Kumar - Aliso Viejo CA, US
Andrew Evan Gruber - Arlington MA, US
Colin Christopher Sharp - Cardiff CA, US
Eric Demers - San Diego CA, US

International Classification:

G06T 1/20
G06T 1/60

Abstract:

This disclosure describes techniques for compressing a graphical state object. In one example, a central processing unit may be configured to receive, for output to the GPU, a set of instructions to render a scene. Responsive to receiving the set of instructions to render the scene, the central processing unit may be further configured to determine whether the set of instructions includes a state object that is registered as corresponding to an identifier. Responsive to determining that the set of instructions includes the state object that is registered as corresponding to the identifier, the central processing unit may be further configured to output, to the GPU, the identifier that is registered as corresponding to the state object.

US Patent:

20150070369, Mar 12, 2015

Filed:

Sep 10, 2013

Appl. No.:

14/023170

Inventors:

- San Diego CA, US
Murat Balci - Orlando FL, US
Avinash Seetharamaiah - Chuluota FL, US
Andrew Evan Gruber - Arlington MA, US
Alexei Vladimirovich Bourd - San Diego CA, US

Assignee:

QUALCOMM Incorporated - San Diego CA

International Classification:

G09G 5/399

US Classification:

345539

Abstract:

This disclosure presents techniques and structures for preemption at arbitrary control points in graphics processing. A method of graphics processing may comprise executing commands in a command buffer, the commands operating on data in a read-modify-write memory resource, double buffering the data in the read-modify-write memory resource, such that a first buffer stores original data of the read-modify-write memory resource and a second buffer stores any modified data produced by executing the commands in the command buffer, receiving a request to preempt execution of the commands in the command buffer before completing all commands in the command buffer, and restarting execution of the commands at the start of the command buffer using the original data in the first buffer.

US Patent:

20140267259, Sep 18, 2014

Filed:

Mar 15, 2013

Appl. No.:

13/841584

Inventors:

- San Diego CA, US
Avinash Seetharamaiah - Chuluota FL, US
Andrew Evan Gruber - Arlington MA, US

Assignee:

QUALCOMM INCORPORATED - San Diego CA

International Classification:

G06T 17/20

US Classification:

345423

Abstract:

This disclosure describes techniques for using bounding regions to perform tile-based rendering with a graphics processing unit (GPU) that supports an on-chip, tessellation-enabled graphics rendering pipeline. Instead of generating binning data based on rasterized versions of the actual primitives to be rendered, the techniques of this disclosure may generate binning data based on a bounding region that encompasses one or more of the primitives to be rendered. Moreover, the binning data may be generated based on data that is generated by at least one tessellation processing stage of an on-chip, tessellation-enabled graphics rendering pipeline that is implemented by the GPU. The techniques of this disclosure may, in some examples, be used to improve the performance of an on-chip, tessellation-enabled GPU when performing tile-based rendering without sacrificing the quality of the resulting rendered image.

US Patent:

20140198119, Jul 17, 2014

Filed:

Jan 17, 2013

Appl. No.:

13/744111

Inventors:

- San Diego CA, US
Murat Balci - Orlando FL, US
Christopher Paul Frascati - Oviedo FL, US
Andrew E. Gruber - Arlington MA, US

Assignee:

QUALCOMM INCORPORATED - San Diego CA

International Classification:

G06T 11/40

US Classification:

345581

Abstract:

In some examples, aspects of this disclosure relate to a method for rendering an image. For example, the method includes generating visibility information indicating visible primitives of the image. The method also includes rendering the image using a binning configuration, wherein the binning configuration is based on the visibility information.