Christopher M Scanlan

US Patent:

6356453, Mar 12, 2002

Filed:

Jun 29, 2000

Appl. No.:

09/608678

Inventors:

Frank Juskey - Phoenix AZ
Christopher Scanlan - Phoenix AZ
Pat OBrien - Muntinlupa, PH

Assignee:

Amkor Technology, Inc. - Chandler AZ

International Classification:

H05K 706

US Classification:

361760, 361782, 361783, 361784, 257724, 257728, 257737, 257778, 257787

Abstract:

A package includes both a flip chip mounted active Chip component and a passive chip component. The flip chip bumps between the bond pads of the active chip component and the substrate are low impedance. Further, by mounting the active chip component as a flip chip, the area on the substrate occupied by the active chip component is approximately equal to the area of the active chip component.

US Patent:

6445075, Sep 3, 2002

Filed:

Jan 26, 2001

Appl. No.:

09/770859

Inventors:

Christopher Scanlan - Phoenix AZ
Jon G. Aday - Gilbert AZ

Assignee:

Amkor Technology, Inc. - Chandler AZ

International Classification:

H01L 2348

US Classification:

257778, 257690, 257696, 257734, 257737

Abstract:

A substrate includes a flip chip bond pad and a first bond pad on a dielectric substrate layer. First and second organic solderability protectant (OSP) layers are on the flip chip bond and first bond pad, respectively. A solder paste is on the first OSP layer. The solder paste is reflowed in an inert atmosphere to form a solder-on-pad (SOP) directly on and in contact with the flip chip bond pad. A sufficient thickness of the second OSP layer remains after reflow to inhibit oxidation of the first bond pad.

US Patent:

6494361, Dec 17, 2002

Filed:

Jan 26, 2001

Appl. No.:

09/770861

Inventors:

Christopher Scanlan - Phoenix AZ
Jon G. Aday - Gilbert AZ

Assignee:

Amkor Technology, Inc. - Chandler AZ

International Classification:

B23K 3102

US Classification:

228223, 228218

Abstract:

Organic solderability protectant (OSP) is applied to copper bond pads. The copper bond pads include flip chip bond pads and SMD bond pads on a dielectric upper surface and BGA bond pads on a dielectric lower surface. Solder paste is applied to the flip chip bond pads. This solder paste is reflowed in an inert atmosphere to form solder-on-pads (SOPs) on the flip chip bond pads. Flux residue from the solder paste is then removed with water. By reflowing the solder paste in an inert atmosphere and removing the flux residue with water, degradation of the OSP and oxidation of the SMD and BGA bond pads is inhibited.

US Patent:

6546620, Apr 15, 2003

Filed:

Jun 29, 2000

Appl. No.:

09/608357

Inventors:

Frank Juskey - Phoenix AZ
Christopher Scanlan - Phoenix AZ
Pat OBrien - Muntinlupa, PH

Assignee:

Amkor Technology, Inc. - Chandler AZ

International Classification:

H05K 334

US Classification:

29840, 29743, 29831, 29832, 29841, 29842, 427 97, 22818021, 22818022, 26427211, 26427212, 26427217

Abstract:

A package includes both a flip chip mounted active chip component and a passive chip component. To form the package, a solder paste is screened onto a passive chip component contact on an upper surface of a substrate. A terminal of the passive chip component is aligned with the solder paste. The solder paste is melted to form a solder joint between the passive chip component contact and the terminal. Solder flux residue from the solder paste is removed. A solder bump is formed on a bond pad of an active chip component. The solder bump is aligned with an active chip component contact on the upper surface of the substrate. The solder bump is melted to form a bump between the active chip component contact and the bond pad, wherein the solder joint does not melt during the melting of the solder bump.

US Patent:

6686649, Feb 3, 2004

Filed:

May 14, 2001

Appl. No.:

09/855244

Inventors:

Douglas Jay Mathews - Gilbert AZ
Robert Joseph Hill - Salinas CA
Michael Paul Gaynor - Chandler AZ
Ronald James Schoonejongen - Chandler AZ
John Armando Miranda - Chandler AZ
Christopher Marc Scanlan - Phoenix AZ

Assignee:

Amkor Technology, Inc. - Chandler AZ
Tyco Electronics Logistics AG

International Classification:

H01L 23552

US Classification:

257659, 257687, 257690

Abstract:

A transceiver package includes a substrate having an upper surface. An electronic component is mounted to the upper surface of the substrate. A shield encloses the electronic component and shields the electronic component from radiation. The transceiver package further includes an antenna and a dielectric cap. The dielectric cap is interposed between the shield and the antenna, the shield being a ground plane for the antenna.

US Patent:

7049682, May 23, 2006

Filed:

Jul 16, 2003

Appl. No.:

10/621780

Inventors:

Douglas Jay Mathews - Gilbert AZ, US
Robert Joseph Hill - Salinas CA, US
Michael Paul Gaynor - Chandler AZ, US
Ronald James Schoonejongen - Chandler AZ, US
John Armando Miranda - Chandler AZ, US
Christopher Marc Scanlan - Phoenix AZ, US

Assignee:

Amkor Technology, Inc. - Chandler AZ
Tyco Electronics Logistics AG

International Classification:

H01L 23/552

US Classification:

257660, 257659, 257690

Abstract:

A transceiver package includes a substrate having an upper surface. An electronic component is mounted to the upper surface of the substrate. A shield encloses the electronic component and shields the electronic component from radiation. The transceiver package further includes an antenna and a dielectric cap. The dielectric cap is interposed between the shield and the antenna, the shield being a ground plane for the antenna.

US Patent:

7342303, Mar 11, 2008

Filed:

Feb 28, 2006

Appl. No.:

11/364427

Inventors:

Christopher J. Berry - Chandler AZ, US
Christopher M. Scanlan - Chandler AZ, US

Assignee:

Amkor Technology, Inc. - Chandler AZ

International Classification:

H01L 23/00

US Classification:

257703, 257728

Abstract:

A semiconductor device and method of manufacturing has a substrate having a plurality of metal layers. At least one metal layer is exposed on at least one side surface of the semiconductor device. A die is coupled to the substrate. A mold compound encapsulates the die and a top surface of the substrate. A conductive coating is applied to the mold compound and to at least one metal layer exposed on at least one side surface of the substrate.

US Patent:

7507603, Mar 24, 2009

Filed:

Dec 2, 2005

Appl. No.:

11/292778

Inventors:

Christopher J. Berry - Chandler AZ, US
Christopher M. Scanlan - Chandler AZ, US
Faheem F. Faheem - Chandler AZ, US

Assignee:

Amkor Technology, Inc. - Chandler AZ

International Classification:

H01L 21/00

US Classification:

438113, 438111, 257E21599

Abstract:

In accordance with the present invention, there is provided various methods of simultaneously fabricating a plurality of semiconductor packages (e. g. , cavity type semiconductor packages) wherein the singulation process is achieved using etching techniques as opposed to more conventional cutting techniques such as sawing or punching. Such etching techniques are inherently lower in cost and free from many of the defects induced by other cutting techniques.